uart_conf_t Struct Reference

UART device configuration. More...

Detailed Description

UART device configuration.

UART configuration data.

Configuration details for an UART interface needed by the RPX0XX peripheral.

UART module configuration options.

Structure for UART configuration data.

UART configuration structure type.

QN908x doesn't have any UART standalone blocks, but it has two FLEXCOMM blocks that can be put in UART mode. The USART_Type* address is one of the FLEXCOMM_Type* addresses as well.

     The frequency f() of the clock `gclk_src` must fulfill the condition

         16 * baud < f(gclk_src) ≤ 2²⁰ * baud

     in Asynchronous Arithmetic mode and

         16 * baud < f(gclk_src) ≤ 2¹⁷ * baud

     in Asynchronous Fractional mode

Definition at line 214 of file periph_cpu.h.

#include <periph_cpu.h>

Data Fields

USART_t * dev
 pointer to the used UART device More...
 
pwr_reduction_t pwr
 Power Management.
 
gpio_t rx_pin
 pin used for RX More...
 
gpio_t tx_pin
 pin used for TX More...
 
cpu_int_lvl_t rx_int_lvl
 RX Complete Interrupt Level.
 
cpu_int_lvl_t tx_int_lvl
 TX Complete Interrupt Level.
 
cpu_int_lvl_t dre_int_lvl
 Data Registry Empty Interrupt Level.
 
cc2538_uart_tdev
 pointer to the used UART device
 
void * dev
 UART, USART or LEUART device used. More...
 
uint32_t loc
 location of UART pins
 
CMU_Clock_TypeDef cmu
 the device CMU channel
 
IRQn_Type irq
 the devices base IRQ channel
 
gpio_t txd
 GPIO used as TxD pin.
 
gpio_t rxd
 GPIO used as RxD pin.
 
uint32_t addr
 UART control register address.
 
gpio_t rx
 RX pin.
 
gpio_t tx
 TX pin.
 
irqn_t isr_num
 ISR source number.
 
USART_Type * dev
 UART device base register address. More...
 
uint32_t rcu_mask
 bit in clock enable register
 
uint8_t bus
 APB bus.
 
uint8_t irqn
 IRQ channel. More...
 
uint32_t freq
 Module clock frequency, usually CLOCK_CORECLOCK or CLOCK_BUSCLOCK.
 
gpio_t pin_rx
 RX pin, GPIO_UNDEF disables RX.
 
gpio_t pin_tx
 TX pin.
 
IRQn_Type irqn
 IRQ number for this module. More...
 
volatile uint32_t * scgc_addr
 Clock enable register, in SIM module.
 
uint8_t scgc_bit
 Clock enable bit, within the register.
 
uart_mode_t mode
 UART mode: data bits, parity, stop bits.
 
uart_type_t type
 Hardware module type (KINETIS_UART or KINETIS_LPUART)
 
LPC_UART_TypeDef * dev
 pointer to the UART device
 
uint8_t irq_rx
 RX IRQ number.
 
uint8_t clk_offset
 The offset of the periph in the clk sel.
 
uint8_t pinsel
 PINSEL# of the RX and TX pin.
 
uint8_t pinsel_shift
 TX/RX bitshift of the PINSEL# register.
 
uint8_t pinsel_af
 Alternate function of the PINSEL# register.
 
lpc23xx_uart_t * dev
 pointer to the UART device
 
uint8_t irq_prio_rx
 priority of the RX IRQ
 
uint8_t pinsel_rx
 PINSEL# of the RX pin

 
uint8_t pinsel_tx
 PINSEL# of the TX pin

 
uint32_t pinsel_msk_rx
 RX PINSEL Mask

 
uint32_t pinsel_msk_tx
 TX PINSEL Mask

 
volatile unsigned int * base
 UART device base register address.
 
uint32_t clock
 Peripheral clock frequency.
 
volatile unsigned int * rx_mux_reg
 Address of RX mux register.
 
volatile unsigned int * tx_mux_reg
 Address of TX mux register.
 
gpio_af_t rx_af
 alternate function for RX pin
 
gpio_af_t tx_af
 alternate function for TX pin
 
uint32_t vector
 vector number
 
NRF_UARTE_Type * dev
 UART with EasyDMA device base register address.
 
UART0_Type * dev
 Base address of the I/O registers of the device.
 
SercomUsart * dev
 pointer to the used UART device
 
gpio_mux_t mux
 alternative function for pins More...
 
uart_rxpad_t rx_pad
 pad selection for RX line
 
uart_txpad_t tx_pad
 pad selection for TX line
 
uart_flag_t flags
 set optional SERCOM flags
 
uint8_t gclk_src
 GCLK source which supplys SERCOM.
 
Uart * dev
 U(S)ART device used.
 
uint8_t pmc_id
 bit in the PMC register of the device
 
USART_TypeDef * dev
 UART device base register address.
 
uint32_t rcc_mask
 bit in clock enable register
 

Field Documentation

◆ dev [1/3]

USART_Type * uart_conf_t::dev

pointer to the used UART device

UART with EasyDMA device base register address.

Pointer to module hardware registers.

Definition at line 215 of file periph_cpu.h.

◆ dev [2/3]

void* uart_conf_t::dev

UART, USART or LEUART device used.

Pointer to module hardware registers.

Definition at line 439 of file periph_cpu.h.

◆ dev [3/3]

USART_Type* uart_conf_t::dev

UART device base register address.

Pointer to module hardware registers.

Definition at line 138 of file periph_cpu.h.

◆ irqn [1/2]

uint8_t uart_conf_t::irqn

IRQ channel.

IRQ number of the UART interface.

interrupt number of the device

Definition at line 143 of file periph_cpu.h.

◆ irqn [2/2]

IRQn_Type uart_conf_t::irqn

IRQ number for this module.

IRQ number of the UART interface.

Definition at line 554 of file periph_cpu.h.

◆ mux

gpio_mux_t uart_conf_t::mux

alternative function for pins

MUX used for pins.

Definition at line 243 of file periph_cpu_common.h.

◆ rx_pin

gpio_t uart_conf_t::rx_pin

pin used for RX

GPIO pin to use for RX.

RX pin, GPIO_UNDEF disables RX.

RX pin.

Definition at line 217 of file periph_cpu.h.

◆ tx_pin

gpio_t uart_conf_t::tx_pin

pin used for TX

GPIO pin to use for TX.

TX pin, GPIO_UNDEF disables TX.

TX pin.

Definition at line 218 of file periph_cpu.h.


The documentation for this struct was generated from the following files: