42#define PM_NUM_MODES (3U)
69#ifndef CONFIG_PM_EWUP_USED
70#define CONFIG_PM_EWUP_USED (0U)
116#define GPIO_UNDEF (0xffffffff)
121#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
131#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
139#define HAVE_GPIO_MODE_T
154#define HAVE_GPIO_FLANK_T
190#define HAVE_GPIO_PULL_STRENGTH_T
198#define HAVE_GPIO_DRIVE_STRENGTH_T
206#define HAVE_GPIO_SLEW_T
233#define DAC_CHANNEL_NUMOF (2)
246#define TIMER_CHANNEL_NUMOF (4U)
251#define TIMER_CHANNEL(tim, chan) *(&dev(tim)->CH0CV + (chan * 2))
279#define UART_ISR_PRIO (2)
287#define SPI_HWCS_MASK (0xffffff00)
295#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
300#define SPI_CS_UNDEF (GPIO_UNDEF)
317#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
319#define PERIPH_SPI_NEEDS_TRANSFER_REG
321#define PERIPH_SPI_NEEDS_TRANSFER_REGS
328#define HAVE_SPI_CLK_T
354#ifdef MODULE_PERIPH_DMA
367#define PERIPH_I2C_NEED_READ_REG
369#define PERIPH_I2C_NEED_WRITE_REG
371#define PERIPH_I2C_NEED_READ_REGS
373#define PERIPH_I2C_NEED_WRITE_REGS
381#define HAVE_I2C_SPEED_T
430#define NWDT_TIME_LOWER_LIMIT (1)
435#define NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * MS_PER_SEC + 1)
441#define WDT_INTR_PRIORITY (PLIC_NUM_PRIORITIES)
446#define WDT_HAS_STOP (0)
454#define RTT_IRQ RTC_ALARM_IRQn
455#define RTT_IRQ_PRIORITY (2)
456#define RTT_MAX_VALUE (0xffffffff)
458#define RTT_MIN_FREQUENCY (1U)
465#define USBDEV_SET_ADDR_AFTER_STATUS 0
466#define USBDEV_NUM_ENDPOINTS 4
502void gd32vf103_clock_init(
void);
503void gd32v_enable_irc8(
void);
504void gd32v_disable_irc8(
void);
@ GPIO_OUT
select GPIO MASK as output
@ GPIO_IN
select GPIO MASK as input
void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over)
Configure an alternate function for the given pin.
gpio_t adc_conf_t
ADC configuration wrapper.
RISCV CLIC interrupt controller definitions.
gpio_af_t
Override alternative GPIO mode options.
@ GPIO_AF_OUT_OD
alternate function output - open-drain
@ GPIO_AF_OUT_PP
alternate function output - push-pull
uint32_t periph_apb_clk(bus_t bus)
Get the actual bus clock frequency for the APB buses.
#define TIMER_CHANNEL_NUMOF
GD32V timers have 4 capture-compare channels.
void gpio_init_analog(gpio_t pin)
Configure the given pin to be used as ADC input.
@ GD32V_PM_IDLE
IDLE mode.
@ GD32V_PM_STANDBY
STANDBY mode,
@ GD32V_PM_DEEPSLEEP
DEEPSLEEP mode, corresponds to STOP mode of STM32.
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
void periph_clk_dis(bus_t bus, uint32_t mask)
Disable the given peripheral clock.
@ APB1
Advanced Peripheral Bus 1
@ AHB
Advanced High-performance Bus.
@ APB2
Advanced Peripheral Bus 2
enum IRQn IRQn_Type
Interrupt Number Definition.
gpio_pull_strength_t
Enumeration of pull resistor values.
gpio_slew_t
Enumeration of slew rate settings.
gpio_drive_strength_t
Enumeration of drive strength options.
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
@ GPIO_PULL_WEAK
Use a weak pull resistor.
@ GPIO_PULL_STRONG
Use a strong pull resistor.
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
unsigned int gpio_t
GPIO type identifier.
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_RISING
emit interrupt on rising flank
@ GPIO_BOTH
emit interrupt on both flanks
@ GPIO_OD
configure as output in open-drain mode without pull resistor
@ GPIO_IN_PU
configure as input with pull-up resistor
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
@ GPIO_IN_PD
configure as input with pull-down resistor
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Adds include for missing inttype definitions.
Common macros and compiler attributes/pragmas configuration.
gpio_mode_t
Available pin modes.
unsigned dma_t
DMA channel type.
uint8_t dev
ADCx - 1 device used for the channel.
gpio_t pin
pin connected to the channel
uint8_t chan
CPU ADC channel connected to the pin.
DAC line configuration data.
uint8_t chan
DAC device used for this line.
gpio_t pin
pin connected to the line
I2C configuration structure.
uint32_t rcu_mask
bit in clock enable register
IRQn_Type irqn
I2C event interrupt number.
gpio_t pin
GPIO pin mapped to this channel.
uint8_t cc_chan
capture compare channel used
PWM device configuration.
uint32_t rcu_mask
bit in clock enable register
uint32_t remap
AFIO remap mask to route periph to other pins (or zero, if not needed)
gpio_af_t af
alternate function used
TIMER_Type * dev
Timer used.
SPI device configuration.
uint32_t rcumask
bit in the RCC peripheral enable register
uint8_t apbbus
APBx bus the device is connected to.
SPI_Type * dev
SPI device base register address.
Timer device configuration.
uint8_t irqn
global IRQ channel
uint8_t bus
APBx bus the timer is clock from.
TIMER_Type * dev
timer device
uint32_t max
maximum value to count to (16/32 bit)
uint32_t rcu_mask
corresponding bit in the RCC register
UART device configuration.
USART_Type * dev
UART device base register address.
uint32_t rcu_mask
bit in clock enable register
#define MHZ(x)
A macro to return the Hz in x MHz.
#define KHZ(x)
A macro to return the Hz in x kHz.