periph_cpu.h
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1/*
2 * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
3 * 2023 Gunar Schorcht <gunar@schorcht.net>
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser General
6 * Public License v2.1. See the file LICENSE in the top level directory for more
7 * details.
8 */
9
21#ifndef PERIPH_CPU_H
22#define PERIPH_CPU_H
23
24#include <inttypes.h>
25
26#include "cpu.h"
27#include "clic.h"
28#include "kernel_defines.h"
29#include "macros/units.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
42#define PM_NUM_MODES (3U)
60enum {
63 GD32V_PM_IDLE = 2
64};
65
69#ifndef CONFIG_PM_EWUP_USED
70#define CONFIG_PM_EWUP_USED (0U)
71#endif
77typedef enum {
81} bus_t;
82
86enum {
87#ifdef GPIOA
88 PORT_A = 0,
89#endif
90#ifdef GPIOB
91 PORT_B = 1,
92#endif
93#ifdef GPIOC
94 PORT_C = 2,
95#endif
96#ifdef GPIOD
97 PORT_D = 3,
98#endif
99#ifdef GPIOE
100 PORT_E = 4,
101#endif
102};
103
104#ifndef DOXYGEN
109#define HAVE_GPIO_T
110typedef uint32_t gpio_t;
116#define GPIO_UNDEF (0xffffffff)
117
121#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
122
131#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
132
139#define HAVE_GPIO_MODE_T
140typedef enum {
141 GPIO_IN = GPIO_MODE(0, 1, 0),
142 GPIO_IN_PD = GPIO_MODE(0, 2, 0),
143 GPIO_IN_PU = GPIO_MODE(0, 2, 1),
144 GPIO_OUT = GPIO_MODE(3, 0, 0),
145 GPIO_OD = GPIO_MODE(3, 1, 0),
146 GPIO_OD_PU = (0xff)
154#define HAVE_GPIO_FLANK_T
155typedef enum {
156 GPIO_RISING = 1,
157 GPIO_FALLING = 2,
158 GPIO_BOTH = 3
161#endif /* ndef DOXYGEN */
162
166typedef enum {
169} gpio_af_t;
170
177void gpio_init_af(gpio_t pin, gpio_af_t af);
178
184void gpio_init_analog(gpio_t pin);
185
186/* Hide this from Doxygen to avoid merging implementation details into
187 * public view on type */
188#ifndef DOXYGEN
189
190#define HAVE_GPIO_PULL_STRENGTH_T
191typedef enum {
193 GPIO_PULL_WEAK = 0,
197
198#define HAVE_GPIO_DRIVE_STRENGTH_T
199typedef enum {
201 GPIO_DRIVE_WEAK = 0,
205
206#define HAVE_GPIO_SLEW_T
207typedef enum {
209 GPIO_SLEW_SLOW = 1,
210 GPIO_SLEW_FAST = 2,
213
214#endif /* !DOXYGEN */
215
219#define ADC_DEVS (2U)
220
224typedef struct {
225 gpio_t pin;
226 uint8_t dev;
227 uint8_t chan;
228} adc_conf_t;
229
233#define DAC_CHANNEL_NUMOF (2)
234
238typedef struct {
239 gpio_t pin;
240 uint8_t chan;
241} dac_conf_t;
242
246#define TIMER_CHANNEL_NUMOF (4U)
247
251#define TIMER_CHANNEL(tim, chan) *(&dev(tim)->CH0CV + (chan * 2))
252
256typedef struct {
257 TIMER_Type *dev;
258 uint32_t max;
259 uint32_t rcu_mask;
260 uint8_t bus;
261 uint8_t irqn;
263
267typedef struct {
268 USART_Type *dev;
269 uint32_t rcu_mask;
270 gpio_t rx_pin;
271 gpio_t tx_pin;
272 uint8_t bus;
273 uint8_t irqn;
275
279#define UART_ISR_PRIO (2)
280
287#define SPI_HWCS_MASK (0xffffff00)
288
295#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
296
300#define SPI_CS_UNDEF (GPIO_UNDEF)
301
302#ifndef DOXYGEN
307#define HAVE_SPI_CS_T
308typedef uint32_t spi_cs_t;
310#endif
311
317#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
319#define PERIPH_SPI_NEEDS_TRANSFER_REG
321#define PERIPH_SPI_NEEDS_TRANSFER_REGS
328#define HAVE_SPI_CLK_T
329enum {
335};
336
340typedef uint32_t spi_clk_t;
346typedef struct {
347 SPI_Type *dev;
348 gpio_t mosi_pin;
349 gpio_t miso_pin;
350 gpio_t sclk_pin;
351 spi_cs_t cs_pin;
352 uint32_t rcumask;
353 uint8_t apbbus;
354#ifdef MODULE_PERIPH_DMA
355 dma_t tx_dma;
356 uint8_t tx_dma_chan;
357 dma_t rx_dma;
358 uint8_t rx_dma_chan;
359#endif
360} spi_conf_t;
361
367#define PERIPH_I2C_NEED_READ_REG
369#define PERIPH_I2C_NEED_WRITE_REG
371#define PERIPH_I2C_NEED_READ_REGS
373#define PERIPH_I2C_NEED_WRITE_REGS
376#ifndef DOXYGEN
381#define HAVE_I2C_SPEED_T
382typedef enum {
383 I2C_SPEED_LOW = KHZ(10),
384 I2C_SPEED_NORMAL = KHZ(100),
385 I2C_SPEED_FAST = KHZ(400),
389#endif /* ndef DOXYGEN */
390
394typedef struct {
395 I2C_Type *dev;
396 i2c_speed_t speed;
397 gpio_t scl_pin;
398 gpio_t sda_pin;
399 uint32_t rcu_mask;
401} i2c_conf_t;
402
406typedef struct {
407 gpio_t pin;
408 uint8_t cc_chan;
409} pwm_chan_t;
410
414typedef struct {
415 TIMER_Type *dev;
416 uint32_t rcu_mask;
417 uint32_t remap;
423 uint8_t bus;
424} pwm_conf_t;
425
430#define NWDT_TIME_LOWER_LIMIT (1)
431/* Ensure the internal "count" variable stays within the uint32 bounds.
432 This variable corresponds to max_time * RTC_FREQ / MS_PER_SEC. On fe310,
433 RTC_FREQ is 32768Hz. The 15 right shift is equivalent to a division by RTC_FREQ.
434 */
435#define NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * MS_PER_SEC + 1)
441#define WDT_INTR_PRIORITY (PLIC_NUM_PRIORITIES)
442
446#define WDT_HAS_STOP (0)
447
452#define RTT_DEV RTC
454#define RTT_IRQ RTC_ALARM_IRQn
455#define RTT_IRQ_PRIORITY (2)
456#define RTT_MAX_VALUE (0xffffffff)
458#define RTT_MIN_FREQUENCY (1U)
465#define USBDEV_SET_ADDR_AFTER_STATUS 0
466#define USBDEV_NUM_ENDPOINTS 4
475void periph_clk_en(bus_t bus, uint32_t mask);
476
483void periph_clk_dis(bus_t bus, uint32_t mask);
484
492uint32_t periph_apb_clk(bus_t bus);
493
500void gpio_init_af(gpio_t pin, gpio_af_t af);
501
502void gd32vf103_clock_init(void);
503void gd32v_enable_irc8(void);
504void gd32v_disable_irc8(void);
505
506#ifdef __cplusplus
507}
508#endif
509
510#endif /* PERIPH_CPU_H */
@ PORT_B
port B
Definition: periph_cpu.h:48
@ PORT_C
port C
Definition: periph_cpu.h:49
@ PORT_E
port E
Definition: periph_cpu.h:51
@ PORT_A
port A
Definition: periph_cpu.h:47
@ PORT_D
port D
Definition: periph_cpu.h:50
gpio_flank_t
Definition: periph_cpu.h:180
GPIO_MODE
Definition: periph_cpu.h:149
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:165
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:164
i2c_speed_t
Definition: periph_cpu.h:276
spi_clk_t
Definition: periph_cpu.h:352
void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over)
Configure an alternate function for the given pin.
gpio_t adc_conf_t
ADC configuration wrapper.
Definition: periph_cpu.h:337
RISCV CLIC interrupt controller definitions.
gpio_af_t
Override alternative GPIO mode options.
Definition: periph_cpu.h:166
@ GPIO_AF_OUT_OD
alternate function output - open-drain
Definition: periph_cpu.h:168
@ GPIO_AF_OUT_PP
alternate function output - push-pull
Definition: periph_cpu.h:167
uint32_t periph_apb_clk(bus_t bus)
Get the actual bus clock frequency for the APB buses.
#define TIMER_CHANNEL_NUMOF
GD32V timers have 4 capture-compare channels.
Definition: periph_cpu.h:246
void gpio_init_analog(gpio_t pin)
Configure the given pin to be used as ADC input.
@ GD32V_PM_IDLE
IDLE mode.
Definition: periph_cpu.h:63
@ GD32V_PM_STANDBY
STANDBY mode,
Definition: periph_cpu.h:61
@ GD32V_PM_DEEPSLEEP
DEEPSLEEP mode, corresponds to STOP mode of STM32.
Definition: periph_cpu.h:62
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
void periph_clk_dis(bus_t bus, uint32_t mask)
Disable the given peripheral clock.
bus_t
On-Chip buses.
Definition: periph_cpu.h:77
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ AHB
Advanced High-performance Bus.
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
enum IRQn IRQn_Type
Interrupt Number Definition.
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition: gpio_ll.h:216
gpio_slew_t
Enumeration of slew rate settings.
Definition: gpio_ll.h:280
gpio_drive_strength_t
Enumeration of drive strength options.
Definition: gpio_ll.h:247
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition: gpio_ll.h:217
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition: gpio_ll.h:218
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition: gpio_ll.h:219
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition: gpio_ll.h:220
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition: gpio_ll.h:281
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition: gpio_ll.h:284
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition: gpio_ll.h:283
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition: gpio_ll.h:285
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition: gpio_ll.h:250
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition: gpio_ll.h:249
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition: gpio_ll.h:251
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition: gpio_ll.h:248
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:91
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:93
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:94
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:95
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:123
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:121
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:125
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:120
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition: periph_cpu.h:280
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: periph_cpu.h:277
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
Definition: spi.h:127
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:353
Adds include for missing inttype definitions.
Common macros and compiler attributes/pragmas configuration.
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:82
unsigned dma_t
DMA channel type.
uint8_t dev
ADCx - 1 device used for the channel.
Definition: periph_cpu.h:226
gpio_t pin
pin connected to the channel
Definition: periph_cpu.h:225
uint8_t chan
CPU ADC channel connected to the pin.
Definition: periph_cpu.h:227
DAC line configuration data.
Definition: periph_cpu.h:238
uint8_t chan
DAC device used for this line.
Definition: periph_cpu.h:240
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:239
I2C configuration structure.
Definition: periph_cpu.h:299
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:399
IRQn_Type irqn
I2C event interrupt number.
Definition: periph_cpu.h:400
I2C_Type * dev
i2c device
Definition: periph_cpu.h:395
PWM channel.
Definition: periph_cpu.h:406
gpio_t pin
GPIO pin mapped to this channel.
Definition: periph_cpu.h:407
uint8_t cc_chan
capture compare channel used
Definition: periph_cpu.h:408
PWM device configuration.
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:416
uint32_t remap
AFIO remap mask to route periph to other pins (or zero, if not needed)
Definition: periph_cpu.h:417
gpio_af_t af
alternate function used
Definition: periph_cpu.h:422
TIMER_Type * dev
Timer used.
Definition: periph_cpu.h:415
uint8_t bus
APB bus.
Definition: periph_cpu.h:423
SPI device configuration.
Definition: periph_cpu.h:337
uint32_t rcumask
bit in the RCC peripheral enable register
Definition: periph_cpu.h:352
gpio_t sclk_pin
SCLK pin.
Definition: periph_cpu.h:350
uint8_t apbbus
APBx bus the device is connected to.
Definition: periph_cpu.h:353
SPI_Type * dev
SPI device base register address.
Definition: periph_cpu.h:347
Timer device configuration.
Definition: periph_cpu.h:264
uint8_t irqn
global IRQ channel
Definition: periph_cpu.h:261
uint8_t bus
APBx bus the timer is clock from.
Definition: periph_cpu.h:260
TIMER_Type * dev
timer device
Definition: periph_cpu.h:257
uint32_t max
maximum value to count to (16/32 bit)
Definition: periph_cpu.h:258
uint32_t rcu_mask
corresponding bit in the RCC register
Definition: periph_cpu.h:259
UART device configuration.
Definition: periph_cpu.h:218
USART_Type * dev
UART device base register address.
Definition: periph_cpu.h:268
uint8_t irqn
IRQ channel.
Definition: periph_cpu.h:273
uint32_t rcu_mask
bit in clock enable register
Definition: periph_cpu.h:269
uint8_t bus
APB bus.
Definition: periph_cpu.h:272
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition: units.h:49
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition: units.h:44