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periph_cpu.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Koen Zandberg <koen@bergzand.net>
3 * SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#include <inttypes.h>
21
22#include "cpu.h"
23#include "clic.h"
24#include "kernel_defines.h"
25#include "macros/units.h"
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
38#define PM_NUM_MODES (3U)
39
56enum {
60};
61
65#ifndef CONFIG_PM_EWUP_USED
66#define CONFIG_PM_EWUP_USED (0U)
67#endif
69
73typedef enum {
77} bus_t;
78
82enum {
83#ifdef GPIOA
84 PORT_A = 0,
85#endif
86#ifdef GPIOB
87 PORT_B = 1,
88#endif
89#ifdef GPIOC
90 PORT_C = 2,
91#endif
92#ifdef GPIOD
93 PORT_D = 3,
94#endif
95#ifdef GPIOE
96 PORT_E = 4,
97#endif
98};
99
100#ifndef DOXYGEN
105#define HAVE_GPIO_T
106typedef uint32_t gpio_t;
108
112#define GPIO_UNDEF (0xffffffff)
113
117#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
118
127#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
128
135#define HAVE_GPIO_MODE_T
136typedef enum {
137 GPIO_IN = GPIO_MODE(0, 1, 0),
138 GPIO_IN_PD = GPIO_MODE(0, 2, 0),
139 GPIO_IN_PU = GPIO_MODE(0, 2, 1),
140 GPIO_OUT = GPIO_MODE(3, 0, 0),
141 GPIO_OD = GPIO_MODE(3, 1, 0),
142 GPIO_OD_PU = (0xff)
145
150#define HAVE_GPIO_FLANK_T
151typedef enum {
152 GPIO_RISING = 1,
153 GPIO_FALLING = 2,
154 GPIO_BOTH = 3
157#endif /* ndef DOXYGEN */
158
162typedef enum {
165} gpio_af_t;
166
173void gpio_init_af(gpio_t pin, gpio_af_t af);
174
180void gpio_init_analog(gpio_t pin);
181
182/* Hide this from Doxygen to avoid merging implementation details into
183 * public view on type */
184#ifndef DOXYGEN
185
186#define HAVE_GPIO_STATE_T
187typedef enum {
195
196#define HAVE_GPIO_PULL_T
197typedef enum {
203
204#define HAVE_GPIO_PULL_STRENGTH_T
205typedef enum {
207 GPIO_PULL_WEAK = 0,
211
212#define HAVE_GPIO_DRIVE_STRENGTH_T
213typedef enum {
215 GPIO_DRIVE_WEAK = 0,
219
220#define HAVE_GPIO_SLEW_T
221typedef enum {
223 GPIO_SLEW_SLOW = 1,
224 GPIO_SLEW_FAST = 2,
227
228#define HAVE_GPIO_CONF_T
229typedef union gpio_conf_gd32v gpio_conf_t;
230
231#endif /* !DOXYGEN */
232
238 uint8_t bits;
239 struct {
272 };
273};
274
278#define ADC_DEVS (2U)
279
283typedef struct {
284 gpio_t pin;
285 uint8_t dev;
286 uint8_t chan;
287} adc_conf_t;
288
292#define DAC_CHANNEL_NUMOF (2)
293
297typedef struct {
298 gpio_t pin;
299 uint8_t chan;
300} dac_conf_t;
301
305#define TIMER_CHANNEL_NUMOF (4U)
306
310#define TIMER_CHANNEL(tim, chan) *(&dev(tim)->CH0CV + (chan * 2))
311
315typedef struct {
316 TIMER_Type *dev;
317 uint32_t max;
318 uint32_t rcu_mask;
319 uint8_t bus;
320 uint8_t irqn;
322
326typedef struct {
327 USART_Type *dev;
328 uint32_t rcu_mask;
329 gpio_t rx_pin;
330 gpio_t tx_pin;
331 uint8_t bus;
332 uint8_t irqn;
334
338#define UART_ISR_PRIO (2)
339
346#define SPI_HWCS_MASK (0xffffff00)
347
354#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
355
359#define SPI_CS_UNDEF (GPIO_UNDEF)
360
361#ifndef DOXYGEN
366#define HAVE_SPI_CS_T
367typedef uint32_t spi_cs_t;
369#endif
370
376#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
378#define PERIPH_SPI_NEEDS_TRANSFER_REG
380#define PERIPH_SPI_NEEDS_TRANSFER_REGS
382
387#define HAVE_SPI_CLK_T
388enum {
394};
395
399typedef uint32_t spi_clk_t;
401
405typedef struct {
406 SPI_Type *dev;
407 gpio_t mosi_pin;
408 gpio_t miso_pin;
409 gpio_t sclk_pin;
411 uint32_t rcumask;
412 uint8_t apbbus;
413#ifdef MODULE_PERIPH_DMA
414 dma_t tx_dma;
415 uint8_t tx_dma_chan;
416 dma_t rx_dma;
417 uint8_t rx_dma_chan;
418#endif
419} spi_conf_t;
420
426#define PERIPH_I2C_NEED_READ_REG
428#define PERIPH_I2C_NEED_WRITE_REG
430#define PERIPH_I2C_NEED_READ_REGS
432#define PERIPH_I2C_NEED_WRITE_REGS
434
435#ifndef DOXYGEN
440#define HAVE_I2C_SPEED_T
441typedef enum {
442 I2C_SPEED_LOW = KHZ(10),
443 I2C_SPEED_NORMAL = KHZ(100),
444 I2C_SPEED_FAST = KHZ(400),
448#endif /* ndef DOXYGEN */
449
453typedef struct {
454 I2C_Type *dev;
456 gpio_t scl_pin;
457 gpio_t sda_pin;
458 uint32_t rcu_mask;
460} i2c_conf_t;
461
465typedef struct {
466 gpio_t pin;
467 uint8_t cc_chan;
468} pwm_chan_t;
469
473typedef struct {
474 TIMER_Type *dev;
475 uint32_t rcu_mask;
476 uint32_t remap;
479 pwm_chan_t chan[TIMER_CHANNEL_NUMOF];
482 uint8_t bus;
483} pwm_conf_t;
484
489#define NWDT_TIME_LOWER_LIMIT (1)
490/* Ensure the internal "count" variable stays within the uint32 bounds.
491 This variable corresponds to max_time * RTC_FREQ / MS_PER_SEC. On fe310,
492 RTC_FREQ is 32768Hz. The 15 right shift is equivalent to a division by RTC_FREQ.
493 */
494#define NWDT_TIME_UPPER_LIMIT ((UINT32_MAX >> 15) * MS_PER_SEC + 1)
496
500#define WDT_INTR_PRIORITY (PLIC_NUM_PRIORITIES)
501
505#define WDT_HAS_STOP (0)
506
511#define RTT_DEV RTC
512
513#define RTT_IRQ RTC_ALARM_IRQn
514#define RTT_IRQ_PRIORITY (2)
515#define RTT_MAX_VALUE (0xffffffff)
516
517#define RTT_MIN_FREQUENCY (1U)
519
524#define USBDEV_SET_ADDR_AFTER_STATUS 0
525#define USBDEV_NUM_ENDPOINTS 4
527
534void periph_clk_en(bus_t bus, uint32_t mask);
535
542void periph_clk_dis(bus_t bus, uint32_t mask);
543
551uint32_t periph_apb_clk(bus_t bus);
552
559void gpio_init_af(gpio_t pin, gpio_af_t af);
560
561void gd32vf103_clock_init(void);
562void gd32v_enable_irc8(void);
563void gd32v_disable_irc8(void);
564
565#ifdef __cplusplus
566}
567#endif
568
@ PORT_B
port B
Definition periph_cpu.h:44
@ PORT_C
port C
Definition periph_cpu.h:45
@ PORT_E
port E
Definition periph_cpu.h:47
@ PORT_A
port A
Definition periph_cpu.h:43
@ PORT_D
port D
Definition periph_cpu.h:46
gpio_flank_t
Definition periph_cpu.h:176
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:161
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:160
i2c_speed_t
Definition periph_cpu.h:272
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition periph_cpu.h:276
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition periph_cpu.h:273
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:275
spi_clk_t
Definition periph_cpu.h:348
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition periph_cpu.h:353
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition periph_cpu.h:352
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition periph_cpu.h:350
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition periph_cpu.h:351
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition periph_cpu.h:349
void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over)
Configure an alternate function for the given pin.
RISCV CLIC interrupt controller definitions.
#define GPIO_MODE(x, y)
Internal macro for combining pin mode (x) and pull-up/down (y).
Definition periph_cpu.h:147
CPU specific definitions.
gpio_af_t
Override alternative GPIO mode options.
Definition periph_cpu.h:162
@ GPIO_AF_OUT_OD
alternate function output - open-drain
Definition periph_cpu.h:164
@ GPIO_AF_OUT_PP
alternate function output - push-pull
Definition periph_cpu.h:163
uint32_t periph_apb_clk(bus_t bus)
Get the actual bus clock frequency for the APB buses.
@ GD32V_PM_IDLE
IDLE mode.
Definition periph_cpu.h:59
@ GD32V_PM_STANDBY
STANDBY mode,.
Definition periph_cpu.h:57
@ GD32V_PM_DEEPSLEEP
DEEPSLEEP mode, corresponds to STOP mode of STM32.
Definition periph_cpu.h:58
void gpio_init_analog(gpio_t pin)
Configure the given pin to be used as ADC input.
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
void periph_clk_dis(bus_t bus, uint32_t mask)
Disable the given peripheral clock.
bus_t
On-Chip buses.
Definition periph_cpu.h:73
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:75
@ AHB
Advanced High-performance Bus.
Definition periph_cpu.h:74
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:76
enum IRQn IRQn_Type
Interrupt Number Definition.
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:88
gpio_pull_t
Enumeration of pull resistor configurations.
Definition gpio_ll.h:257
gpio_pull_strength_t
Enumeration of pull resistor values.
Definition gpio_ll.h:275
gpio_state_t
Enumeration of GPIO states (direction)
Definition gpio_ll.h:165
gpio_slew_t
Enumeration of slew rate settings.
Definition gpio_ll.h:339
gpio_drive_strength_t
Enumeration of drive strength options.
Definition gpio_ll.h:306
typedef gpio_conf_t
GPIO pin configuration.
Definition gpio_ll.h:423
@ GPIO_FLOATING
No pull ups nor pull downs enabled.
Definition gpio_ll.h:258
@ GPIO_PULL_KEEP
Keep the signal at current logic level with pull up/down resistors.
Definition gpio_ll.h:261
@ GPIO_PULL_DOWN
Pull down resistor enabled.
Definition gpio_ll.h:260
@ GPIO_PULL_UP
Pull up resistor enabled.
Definition gpio_ll.h:259
@ GPIO_PULL_WEAKEST
Use the weakest (highest Ohm value) resistor.
Definition gpio_ll.h:276
@ GPIO_PULL_WEAK
Use a weak pull resistor.
Definition gpio_ll.h:277
@ GPIO_PULL_STRONG
Use a strong pull resistor.
Definition gpio_ll.h:278
@ GPIO_PULL_STRONGEST
Use the strongest pull resistor.
Definition gpio_ll.h:279
@ GPIO_OUTPUT_OPEN_SOURCE
Use pin as output in open emitter configuration.
Definition gpio_ll.h:202
@ GPIO_USED_BY_PERIPHERAL
The GPIO pin is used by a peripheral.
Definition gpio_ll.h:221
@ GPIO_OUTPUT_OPEN_DRAIN
Use pin as output in open collector configuration.
Definition gpio_ll.h:189
@ GPIO_OUTPUT_PUSH_PULL
Use pin as output in push-pull configuration.
Definition gpio_ll.h:176
@ GPIO_DISCONNECT
Disconnect pin from all peripherals.
Definition gpio_ll.h:249
@ GPIO_INPUT
Use pin as input.
Definition gpio_ll.h:208
@ GPIO_SLEW_SLOWEST
let the output voltage level rise/fall as slow as possible
Definition gpio_ll.h:340
@ GPIO_SLEW_FAST
let the output voltage level rise/fall fast
Definition gpio_ll.h:343
@ GPIO_SLEW_SLOW
let the output voltage level rise/fall slowly
Definition gpio_ll.h:342
@ GPIO_SLEW_FASTEST
let the output voltage level rise/fall as fast as possible
Definition gpio_ll.h:344
@ GPIO_DRIVE_STRONG
Use a strong drive strength.
Definition gpio_ll.h:309
@ GPIO_DRIVE_WEAK
Use a weak drive strength.
Definition gpio_ll.h:308
@ GPIO_DRIVE_STRONGEST
Use the strongest drive strength.
Definition gpio_ll.h:310
@ GPIO_DRIVE_WEAKEST
Use the weakest drive strength.
Definition gpio_ll.h:307
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
Definition spi.h:135
Adds include for missing inttype definitions.
Common macros and compiler attributes/pragmas configuration.
unsigned dma_t
DMA channel type.
ADC device configuration.
Definition periph_cpu.h:374
ADC_TypeDef * dev
ADC device used.
Definition periph_cpu.h:375
gpio_t pin
pin connected to the channel
Definition periph_cpu.h:284
uint8_t chan
CPU ADC channel connected to the pin.
Definition periph_cpu.h:286
DAC line configuration data.
Definition periph_cpu.h:297
uint8_t chan
DAC device used for this line.
Definition periph_cpu.h:299
gpio_t pin
pin connected to the line
Definition periph_cpu.h:298
I2C configuration structure.
Definition periph_cpu.h:295
uint32_t rcu_mask
bit in clock enable register
Definition periph_cpu.h:458
i2c_speed_t speed
Configured bus speed, actual speed may be lower but never higher.
Definition periph_cpu.h:300
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:296
IRQn_Type irqn
I2C event interrupt number.
Definition periph_cpu.h:459
gpio_t sda_pin
SDA GPIO pin.
Definition periph_cpu.h:298
gpio_t scl_pin
SCL GPIO pin.
Definition periph_cpu.h:299
PWM channel.
Definition periph_cpu.h:465
gpio_t pin
GPIO pin mapped to this channel.
Definition periph_cpu.h:466
uint8_t cc_chan
capture compare channel used
Definition periph_cpu.h:467
PWM device configuration.
uint32_t rcu_mask
bit in clock enable register
Definition periph_cpu.h:475
uint32_t remap
AFIO remap mask to route periph to other pins (or zero, if not needed)
Definition periph_cpu.h:476
gpio_af_t af
alternate function used
Definition periph_cpu.h:481
mini_timer_t * dev
Timer used.
uint8_t bus
APB bus.
Definition periph_cpu.h:482
pwm_chan_t chan[TIMER_CHANNEL_NUMOF]
channel mapping set to {GPIO_UNDEF, 0} if not used
Definition periph_cpu.h:479
SPI device configuration.
Definition periph_cpu.h:333
gpio_t miso_pin
pin used for MISO
Definition periph_cpu.h:337
uint32_t rcumask
bit in the RCC peripheral enable register
Definition periph_cpu.h:411
gpio_t mosi_pin
pin used for MOSI
Definition periph_cpu.h:338
gpio_t sclk_pin
SCLK pin.
Definition periph_cpu.h:409
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:334
spi_cs_t cs_pin
pin used for CS
Definition periph_cpu.h:296
uint8_t apbbus
APBx bus the device is connected to.
Definition periph_cpu.h:412
Timer device configuration.
Definition periph_cpu.h:260
uint8_t irqn
global IRQ channel
Definition periph_cpu.h:320
uint8_t bus
APBx bus the timer is clock from.
Definition periph_cpu.h:319
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:261
uint32_t max
maximum value to count to (16/32 bit)
Definition periph_cpu.h:317
uint32_t rcu_mask
corresponding bit in the RCC register
Definition periph_cpu.h:318
UART device configuration.
Definition periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:215
uint8_t irqn
IRQ channel.
Definition periph_cpu.h:332
uint32_t rcu_mask
bit in clock enable register
Definition periph_cpu.h:328
gpio_t tx_pin
pin used for TX
Definition periph_cpu.h:218
gpio_t rx_pin
pin used for RX
Definition periph_cpu.h:217
uint8_t bus
APB bus.
Definition periph_cpu.h:331
GPIO pin configuration for GD32V MCUs.
Definition periph_cpu.h:237
gpio_pull_t pull
Pull resistor configuration.
Definition periph_cpu.h:247
gpio_slew_t slew_rate
Configure the slew rate of outputs.
Definition periph_cpu.h:257
bool initial_value
Initial value of the output.
Definition periph_cpu.h:271
uint8_t bits
the raw bits
Definition periph_cpu.h:238
gpio_state_t state
State of the pin.
Definition periph_cpu.h:243
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition units.h:48
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition units.h:43