CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author: Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de; Sebastian Meiling s@mln.nosp@m.g.ne.nosp@m.t

Definition in file periph_cpu.h.

#include <stdint.h>
#include <stdio.h>
#include "vendor/hw_soc_adc.h"
#include "cpu.h"
#include "vendor/hw_ssi.h"
#include "vendor/hw_uart.h"

Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures
struct	i2c_conf_t
	I2C configuration structure. More...

struct	uart_conf_t
	UART device configuration. More...

struct	spi_clk_conf_t
	Datafields for static SPI clock configuration values. More...

struct	spi_conf_t
	SPI device configuration. More...

struct	timer_conf_t
	Timer device configuration. More...

Macros
#define	GPIO_UNDEF (0xffffffff)
	Define custom value to specify undefined or unused GPIOs.

#define	GPIO_MUX_NONE (0xff)
	Custom value to indicate unused parameter in gpio_init_mux.

#define	GPIO_PIN(port, pin)
	Define a custom GPIO_PIN macro.

Typedefs
typedef gpio_t	adc_conf_t
	ADC configuration wrapper.

Functions
void	gpio_init_af (gpio_t pin, uint8_t sel, uint8_t over)
	Configure an alternate function for the given pin.

void	gpio_init_mux (gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
	Configure an alternate function for the given pin.

Variables
static const spi_clk_conf_t	spi_clk_config []
	Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)

#define	CPUID_ADDR (&IEEE_ADDR_MSWORD)
	Starting offset of CPU_ID.

#define	CPUID_LEN (8U)
	Length of the CPU_ID in octets.

Define a custom type for GPIO pins
#define	HAVE_GPIO_T

typedef uint32_t	gpio_t

Power mode configuration
#define	PM_NUM_MODES (5)

SOC_ADC_ADCCON3_EREF registers field values
#define	SOC_ADC_ADCCON3_EREF_INT (0 << SOC_ADC_ADCCON3_EREF_S)
	Internal reference.

#define	SOC_ADC_ADCCON3_EREF_EXT (1 << SOC_ADC_ADCCON3_EREF_S)
	External reference on AIN7 pin.

#define	SOC_ADC_ADCCON3_EREF_AVDD5 (2 << SOC_ADC_ADCCON3_EREF_S)
	AVDD5 pin.

#define	SOC_ADC_ADCCON3_EREF_DIFF (3 << SOC_ADC_ADCCON3_EREF_S)
	External reference on AIN6-AIN7 differential input.

Bit shift for data per ADC resolution
#define	SOCADC_7_BIT_RSHIFT (9U)
	Mask for getting data( 7 bits ENOB)

#define	SOCADC_9_BIT_RSHIFT (7U)
	Mask for getting data( 9 bits ENOB)

#define	SOCADC_10_BIT_RSHIFT (6U)
	Mask for getting data(10 bits ENOB)

#define	SOCADC_12_BIT_RSHIFT (4U)
	Mask for getting data(12 bits ENOB)

RTT configuration
#define	RTT_DEV SMWDTHROSC

#define	RTT_IRQ SM_TIMER_ALT_IRQn

#define	RTT_IRQ_PRIO 1

#define	RTT_ISR isr_sleepmode

#define	RTT_MAX_VALUE (0xffffffff)

#define	RTT_FREQUENCY (CLOCK_OSC32K)

#define	RTT_MIN_OFFSET (5U)

WDT upper and lower bound times in ms
#define	NWDT_TIME_LOWER_LIMIT (2U)

#define	NWDT_TIME_UPPER_LIMIT (1000U)

Macro Definition Documentation

◆ CPUID_ADDR

#define CPUID_ADDR (&IEEE_ADDR_MSWORD)

Starting offset of CPU_ID.

Definition at line 36 of file periph_cpu.h.

◆ CPUID_LEN

#define CPUID_LEN (8U)

Length of the CPU_ID in octets.

Definition at line 41 of file periph_cpu.h.

◆ GPIO_MUX_NONE

#define GPIO_MUX_NONE (0xff)

Custom value to indicate unused parameter in gpio_init_mux.

Definition at line 66 of file periph_cpu.h.

◆ GPIO_PIN

#define GPIO_PIN	(		port,
			pin )

Value:

(gpio_t)(((uint32_t)GPIO_BASE + \

(port << GPIO_PORTNUM_SHIFT)) | pin)

GPIO_PORTNUM_SHIFT

#define GPIO_PORTNUM_SHIFT

bit shift for GPIO port

Definition cc2538_gpio.h:216

GPIO_BASE

#define GPIO_BASE

GPIO port instance base address.

Definition cc2538_gpio.h:210

Define a custom GPIO_PIN macro.

For the CC2538, we use OR the gpio ports base register address with the actual pin number.

Definition at line 73 of file periph_cpu.h.

◆ GPIO_UNDEF

#define GPIO_UNDEF (0xffffffff)

Define custom value to specify undefined or unused GPIOs.

Definition at line 61 of file periph_cpu.h.

◆ HAVE_GPIO_T

#define HAVE_GPIO_T

Definition at line 47 of file periph_cpu.h.

◆ NWDT_TIME_LOWER_LIMIT

#define NWDT_TIME_LOWER_LIMIT (2U)

Definition at line 377 of file periph_cpu.h.

◆ NWDT_TIME_UPPER_LIMIT

#define NWDT_TIME_UPPER_LIMIT (1000U)

Definition at line 378 of file periph_cpu.h.

◆ PERIPH_I2C_NEED_READ_REG

#define PERIPH_I2C_NEED_READ_REG

Definition at line 99 of file periph_cpu.h.

◆ PERIPH_I2C_NEED_READ_REGS

#define PERIPH_I2C_NEED_READ_REGS

Definition at line 100 of file periph_cpu.h.

◆ PERIPH_I2C_NEED_WRITE_REG

#define PERIPH_I2C_NEED_WRITE_REG

Definition at line 101 of file periph_cpu.h.

◆ PERIPH_I2C_NEED_WRITE_REGS

#define PERIPH_I2C_NEED_WRITE_REGS

Definition at line 102 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_INIT_CS

#define PERIPH_SPI_NEEDS_INIT_CS

Definition at line 134 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_BYTE

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE

Definition at line 135 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REG

#define PERIPH_SPI_NEEDS_TRANSFER_REG

Definition at line 136 of file periph_cpu.h.

◆ PERIPH_SPI_NEEDS_TRANSFER_REGS

#define PERIPH_SPI_NEEDS_TRANSFER_REGS

Definition at line 137 of file periph_cpu.h.

◆ PM_NUM_MODES

#define PM_NUM_MODES (5)

Definition at line 55 of file periph_cpu.h.

◆ RTT_DEV

#define RTT_DEV SMWDTHROSC

Definition at line 359 of file periph_cpu.h.

◆ RTT_FREQUENCY

#define RTT_FREQUENCY (CLOCK_OSC32K)

Definition at line 364 of file periph_cpu.h.

◆ RTT_IRQ

#define RTT_IRQ SM_TIMER_ALT_IRQn

Definition at line 360 of file periph_cpu.h.

◆ RTT_IRQ_PRIO

#define RTT_IRQ_PRIO 1

Definition at line 361 of file periph_cpu.h.

◆ RTT_ISR

#define RTT_ISR isr_sleepmode

Definition at line 362 of file periph_cpu.h.

◆ RTT_MAX_VALUE

#define RTT_MAX_VALUE (0xffffffff)

Definition at line 363 of file periph_cpu.h.

◆ RTT_MIN_OFFSET

#define RTT_MIN_OFFSET (5U)

Definition at line 368 of file periph_cpu.h.

◆ SOC_ADC_ADCCON3_EREF_AVDD5

#define SOC_ADC_ADCCON3_EREF_AVDD5 (2 << SOC_ADC_ADCCON3_EREF_S)

AVDD5 pin.

Definition at line 341 of file periph_cpu.h.

◆ SOC_ADC_ADCCON3_EREF_DIFF

#define SOC_ADC_ADCCON3_EREF_DIFF (3 << SOC_ADC_ADCCON3_EREF_S)

External reference on AIN6-AIN7 differential input.

Definition at line 342 of file periph_cpu.h.

◆ SOC_ADC_ADCCON3_EREF_EXT

#define SOC_ADC_ADCCON3_EREF_EXT (1 << SOC_ADC_ADCCON3_EREF_S)

External reference on AIN7 pin.

Definition at line 340 of file periph_cpu.h.

◆ SOC_ADC_ADCCON3_EREF_INT

#define SOC_ADC_ADCCON3_EREF_INT (0 << SOC_ADC_ADCCON3_EREF_S)

Internal reference.

Definition at line 339 of file periph_cpu.h.

◆ SOCADC_10_BIT_RSHIFT

#define SOCADC_10_BIT_RSHIFT (6U)

Mask for getting data(10 bits ENOB)

Definition at line 351 of file periph_cpu.h.

◆ SOCADC_12_BIT_RSHIFT

#define SOCADC_12_BIT_RSHIFT (4U)

Mask for getting data(12 bits ENOB)

Definition at line 352 of file periph_cpu.h.

◆ SOCADC_7_BIT_RSHIFT

#define SOCADC_7_BIT_RSHIFT (9U)

Mask for getting data( 7 bits ENOB)

Definition at line 349 of file periph_cpu.h.

◆ SOCADC_9_BIT_RSHIFT

#define SOCADC_9_BIT_RSHIFT (7U)

Mask for getting data( 9 bits ENOB)

Definition at line 350 of file periph_cpu.h.

Typedef Documentation

◆ adc_conf_t

typedef gpio_t adc_conf_t

ADC configuration wrapper.

Definition at line 333 of file periph_cpu.h.

◆ gpio_t

typedef uint32_t gpio_t

Definition at line 48 of file periph_cpu.h.

Function Documentation

◆ gpio_init_af()

void gpio_init_af	(	gpio_t	pin,
		uint8_t	sel,
		uint8_t	over )

Configure an alternate function for the given pin.

Parameters

[in]	pin	gpio pin
[in]	sel	Select pin peripheral function
[in]	over	Override pin configuration

◆ gpio_init_mux()

void gpio_init_mux	(	gpio_t	pin,
		uint8_t	over,
		uint8_t	sel,
		uint8_t	func )

Configure an alternate function for the given pin.

Parameters

[in]	pin	gpio pin
[in]	over	Override pin configuration
[in]	sel	Set peripheral function for pin (output)
[in]	func	Set pin for peripheral function (input)

Variable Documentation

◆ spi_clk_config

const spi_clk_conf_t spi_clk_config[]

static

Initial value:

= {
    { .cpsr = 64, .scr =  4 },  
    { .cpsr = 16, .scr =  4 },  
    { .cpsr = 32, .scr =  0 },  
    { .cpsr =  2, .scr =  2 },  
    { .cpsr =  2, .scr =  1 }   
}

Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)

SPI bus frequency = CLOCK_CORECLOCK / (CPSR * (SCR + 1)), with CPSR = 2..254 and even, SCR = 0..255

Definition at line 278 of file periph_cpu.h.