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periph_cpu.h
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1/*
2 * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include <stdint.h>
20
21#include "cpu.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#ifndef DOXYGEN
32#define HAVE_GPIO_T
33typedef uint8_t gpio_t;
35
39#define GPIO_PIN(port, pin) (gpio_t)((port << 5) | pin)
40
45#define PIN_DIR_IN (0x00 << 0)
46#define PIN_DIR_OUT (0x01 << 0)
47#define PIN_MODE_PU (0x00 << 1)
48#define PIN_MODE_PD (0x02 << 1)
49#define PIN_MODE_NONE (0x03 << 1)
50#define PIN_MODE_OD (0x01 << 3)
51
52#define HAVE_GPIO_MODE_T
53typedef enum {
54 GPIO_IN = (PIN_DIR_IN | PIN_MODE_NONE),
55 GPIO_IN_PD = (PIN_DIR_IN | PIN_MODE_PD),
56 GPIO_IN_PU = (PIN_DIR_IN | PIN_MODE_PU),
57 GPIO_OUT = (PIN_DIR_OUT | PIN_MODE_NONE),
58 GPIO_OD = (PIN_DIR_OUT | PIN_MODE_OD),
59 GPIO_OD_PU = (PIN_DIR_OUT | PIN_MODE_OD | PIN_MODE_PU)
62#endif /* ndef DOXYGEN */
63
67#define PROVIDES_PM_LAYERED_OFF
68
72#define PM_NUM_MODES (3U)
73
77typedef struct {
78 LPC_UART_TypeDef *dev;
79 uint8_t irq_rx;
80 uint8_t clk_offset;
81 uint8_t pinsel;
82 uint8_t pinsel_shift;
83 uint8_t pinsel_af;
85
86#ifdef __cplusplus
87}
88#endif
89
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:161
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:160
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:88
UART device configuration.
Definition periph_cpu.h:214
uint8_t pinsel_shift
TX/RX bitshift of the PINSEL# register.
Definition periph_cpu.h:82
uint8_t pinsel
PINSEL# of the RX and TX pin.
Definition periph_cpu.h:81
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:215
uint8_t irq_rx
RX IRQ number.
Definition periph_cpu.h:79
uint8_t clk_offset
The offset of the periph in the clk sel.
Definition periph_cpu.h:80
uint8_t pinsel_af
Alternate function of the PINSEL# register.
Definition periph_cpu.h:83