periph_conf.h File Reference

Peripheral MCU configuration for TI CC1350 LaunchPad. More...

Detailed Description

Peripheral MCU configuration for TI CC1350 LaunchPad.

Author
Jean Pierre Dudey jeand.nosp@m.udey.nosp@m.@hotm.nosp@m.ail..nosp@m.com

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "macros/units.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Clock configuration

#define CLOCK_CORECLOCK   MHZ(48)
 

Timer configuration

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e.

if multiple timers are enabled.

#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

The used CC26x0 CPU only supports a single UART device, so all we need to configure are the RX and TX pins.

Optionally we can enable hardware flow control, by using periph_uart_hw_fc module (USEMODULE += periph_uart_hw_fc) and defining pins for cts_pin and rts_pin.

#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

I2C configuration

#define I2C_NUMOF   (1)
 
#define I2C_SDA_PIN   GPIO_PIN(0, 5)
 
#define I2C_SCL_PIN   GPIO_PIN(0, 4)
 

Variable Documentation

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.cfg = GPT_CFG_16T,
.chn = 2,
},
{
.cfg = GPT_CFG_32T,
.chn = 1,
},
{
.cfg = GPT_CFG_16T,
.chn = 2,
},
{
.cfg = GPT_CFG_32T,
.chn = 1,
}
}
#define GPT_CFG_32T
GPT register values.

Definition at line 45 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.regs = UART0,
.tx_pin = GPIO_PIN(0, 3),
.rx_pin = GPIO_PIN(0, 2),
.intn = UART0_IRQN
}
}
#define UART0
UART0 register bank.
21 UART0 Rx and Tx
Definition: cc26xx_cc13xx.h:89
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 79 of file periph_conf.h.