- Generated on Mon Dec 23 2024 22:28:01 by
1.9.8
The periph_fmc module implements a driver for STM32 FMC/FSMC peripherals.
More...
The periph_fmc module implements a driver for STM32 FMC/FSMC peripherals.
It supports
NAND Flashes are not yet supported.
To use the FMC/FSMC, the periph_fmc module has to be enabled. To keep required data structures and resulting code as small as possible, a couple of pseudomodules are defined that have to be used in addition to the periph_fmc module to enable supported features. These are:
| Module | Feature |
|---|---|
periph_fmc_nor_sram | enable NOR Flash and PSRAM/SRAM support |
periph_fmc_sdram | enable SDRAM support |
periph_fmc_16bit | enable 16-bit support |
periph_fmc_32bit | enable 32-bit support |
The board has then to define
As examples for such configurations, see STM32L496G-DISCO (FMC with Display and SRAM) or STM32F429I-DISC1 (FMC with SDRAM).
To use the RAM connected to the FMC as heap, the board has also to define FMC_RAM_ADDR and FMC_RAM_LEN.
Files | |
| file | cpu_fmc.h |
| Specific FMC definitions for the STM32. | |
Data Structures | |
| struct | fmc_nor_sram_timing_t |
| Timing configuration for NOR/PSRAM/SRAM. More... | |
| struct | fmc_nor_sram_bank_conf_t |
| Bank configuration structure for NOR/PSRAM/SRAM. More... | |
| struct | fmc_sdram_timing_t |
| Timing configuration for SDRAM. More... | |
| struct | fmc_sdram_bank_conf_t |
| Bank configuration structure for SDRAM. More... | |
| struct | fmc_gpio_t |
| FMC GPIO configuration type. More... | |
| struct | fmc_conf_t |
| FMC peripheral configuration. More... | |
| struct | fmc_bank_conf_t |
| Bank configuration structure. More... | |
Macros | |
| #define | FMC_BANK_CONFIG(n) (&fmc_bank_config[n]) |
| Gives the configuration of n-th bank. | |
| #define | FMC_DATA_PIN_NUMOF (32) |
| Number of data pins used. | |
| #define | FMC_ADDR_PIN_NUMOF (26) |
| Number of address pins used. | |
| #define | FMC_RAM_ADDR 0x60000000 |
| Start address of the heap for the FMC RAM. | |
| #define | FMC_RAM_LEN 1024K |
| Length of the heap for the FMC RAM. | |
Type declarations for NOR Flash, PSRAM and SRAM | |
| enum | fmc_access_mode_t { FMC_MODE_A = 0 , FMC_MODE_B = 1 , FMC_MODE_C = 2 , FMC_MODE_D = 3 } |
| Memory access modes for NOR/PSRAM/SRAM in extended mode. More... | |
Type declarations for SDRAMs | |
| enum | fmc_bust_length_t { FMC_BURST_LENGTH_1 = 0 , FMC_BURST_LENGTH_2 = 1 , FMC_BURST_LENGTH_4 = 2 , FMC_BURST_LENGTH_8 = 3 , FMC_BURST_LENGTH_16 = 4 , FMC_BURST_LENGTH_32 = 5 , FMC_BURST_LENGTH_64 = 6 , FMC_BURST_LENGTH_FULL = 7 } |
| SDRAM Burst Length as an exponent of a power of two. More... | |
Type declarations that are common for all memories | |
| enum | fmc_bank_t { FMC_BANK_1 = 1 } |
| Memory banks. More... | |
| enum | fmc_mem_type_t { FMC_SRAM = 0 , FMC_PSRAM = 1 , FMC_NOR = 2 , FMC_NAND = 3 , FMC_SDRAM = 4 } |
| Memory types supported by the FMC controller. More... | |
| enum | fmc_bus_width_t { FMC_BUS_WIDTH_8BIT = 0 , FMC_BUS_WIDTH_16BIT = 1 , FMC_BUS_WIDTH_32BIT = 2 } |
| Memory data bus widths. More... | |
| typedef uint8_t | fmc_bank_id_t |
| FMC bank identifier. | |
| #define FMC_ADDR_PIN_NUMOF (26) |
Number of address pins used.
The number of configured address pins depends on the memory types used. NORs, PSRAMs and SRAMs (module periph_fmc_nor_sram) use up to 26 address signals A0...A25 if address/data multiplexing is not used. SDRAMs (module periph_fmc_sdram) use only up to 13 address signals A0...A12. NANDs (module periph_fmc_sdram) don't need separate address signals. The type of used memories is specified by the corresponding pseudomodules.
| #define FMC_BANK_CONFIG | ( | n | ) | (&fmc_bank_config[n]) |
Gives the configuration of n-th bank.
This macro gives a pointer to the n-th entry of type fmc_bank_conf_t of the banks configured by the board in the fmc_bank_config array. n is in the range 0 ... FMC_BANK_NUMOF - 1.
| #define FMC_DATA_PIN_NUMOF (32) |
Number of data pins used.
The number of configured data pins depends on the memory with the maximum data bus width. The maximum data bus width used has to be specified by the pseudomodules periph_fmc_16bit and periph_fmc_32bit. 8 bit data bus width is the default.
| #define FMC_RAM_ADDR 0x60000000 |
Start address of the heap for the FMC RAM.
This variable has to be defined in Makefile.include of the board definition to use the a RAM connected to the FMC as heap. It has to correspond to the fmc_bank_conf_t::address in FMC bank configuration.
FMC_RAM_ADDR is not a macro and cannot be used in C code. It is just defined for documentation purpose. | #define FMC_RAM_LEN 1024K |
Length of the heap for the FMC RAM.
This variable has to be defined in Makefile.include of the board definition to use the a RAM connected to the FMC as heap. It has to correspond to the fmc_bank_conf_t::size in FMC bank configuration. Since it is used in linker script, it has to be defined in kByte with suffix K, e.g. 1024K.
FMC_RAM_SIZE is not a macro and cannot be used in C code. It is just defined for documentation purpose. | typedef uint8_t fmc_bank_id_t |
| enum fmc_access_mode_t |
| enum fmc_bank_t |
| enum fmc_bus_width_t |
| enum fmc_bust_length_t |
| enum fmc_mem_type_t |
1.9.8