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cfg_clock_default.h File Reference

Default STM32L0/STM32L1 clock configuration. More...

Detailed Description

Default STM32L0/STM32L1 clock configuration.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file cfg_clock_default.h.

#include "cfg_clock_common_lx_u5_wx.h"
#include "kernel_defines.h"
#include "macros/units.h"
#include "periph_cpu.h"
+ Include dependency graph for cfg_clock_default.h:

Go to the source code of this file.

L0/L1 clock system configuration

#define CONFIG_CLOCK_PLL_DIV   (2)
 
#define CONFIG_CLOCK_PLL_MUL   (4)
 
#define CLOCK_AHB   CLOCK_CORECLOCK /* max: 32MHz */
 
#define CONFIG_CLOCK_APB1_DIV   (1)
 
#define CLOCK_APB1   (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV) /* max: 32MHz */
 
#define CONFIG_CLOCK_APB2_DIV   (1)
 
#define CLOCK_APB2   (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV) /* max: 32MHz */
 

Macro Definition Documentation

◆ CLOCK_AHB

#define CLOCK_AHB   CLOCK_CORECLOCK /* max: 32MHz */

Definition at line 83 of file cfg_clock_default.h.

◆ CLOCK_APB1

#define CLOCK_APB1   (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV) /* max: 32MHz */

Definition at line 88 of file cfg_clock_default.h.

◆ CLOCK_APB2

#define CLOCK_APB2   (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV) /* max: 32MHz */

Definition at line 92 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB1_DIV

#define CONFIG_CLOCK_APB1_DIV   (1)

Definition at line 86 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_APB2_DIV

#define CONFIG_CLOCK_APB2_DIV   (1)

Definition at line 90 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_PLL_DIV

#define CONFIG_CLOCK_PLL_DIV   (2)

Definition at line 41 of file cfg_clock_default.h.

◆ CONFIG_CLOCK_PLL_MUL

#define CONFIG_CLOCK_PLL_MUL   (4)

Definition at line 44 of file cfg_clock_default.h.