Default STM32F4 clock configuration for 100MHz boards. More...
Default STM32F4 clock configuration for 100MHz boards.
Definition in file cfg_clock_default_100.h.
 Include dependency graph for cfg_clock_default_100.h:
 Include dependency graph for cfg_clock_default_100.h:Go to the source code of this file.
| Clock PLL settings (100MHz) | |
| #define | CONFIG_CLOCK_PLL_M (4) | 
| #define | CONFIG_CLOCK_PLL_N (50) | 
| #define | CONFIG_CLOCK_PLL_P (2) | 
| #define | CONFIG_CLOCK_PLL_Q (4) | 
| #define | CONFIG_CLOCK_PLL_R (4) | 
| Clock bus settings (APB1 and APB2) | |
| #define | CONFIG_CLOCK_APB1_DIV (2) /* max 50MHz */ | 
| #define | CONFIG_CLOCK_APB2_DIV (1) /* max 100MHz */ | 
| #define CONFIG_CLOCK_APB1_DIV (2) /* max 50MHz */ | 
Definition at line 81 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_APB2_DIV (1) /* max 100MHz */ | 
Definition at line 84 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_PLL_M (4) | 
Definition at line 42 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_PLL_N (50) | 
Definition at line 61 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_PLL_P (2) | 
Definition at line 66 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_PLL_Q (4) | 
Definition at line 69 of file cfg_clock_default_100.h.
| #define CONFIG_CLOCK_PLL_R (4) | 
Definition at line 72 of file cfg_clock_default_100.h.