periph_cpu.h File Reference

CPU specific definitions and functions for peripheral handling. More...

Detailed Description

CPU specific definitions and functions for peripheral handling.

Gunar Schorcht

Definition in file periph_cpu.h.

#include <stdint.h>
#include <limits.h>
#include "eagle_soc.h"
#include "cpu_conf.h"
+ Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  i2c_conf_t
 I2C configuration structure. More...
struct  spi_conf_t
 SPI device configuration. More...
struct  uart_conf_t
 UART device configuration. More...


#define GPIO_UNDEF   ((gpio_t)(UINT_MAX))
 Definition of a fitting UNDEF value. More...
#define GPIO_PIN(x, y)   ((x & 0) | y)
 Define a CPU specific GPIO pin generator macro. More...
#define PORT_GPIO   (0)
 Available GPIO ports on ESP8266. More...
#define GPIO_PIN_NUMOF   (17)
 Define CPU specific number of GPIO pins. More...
 Prevent shared timer functions from being used. More...
#define CPUID_LEN   (4U)
 Length of the CPU_ID in octets. More...

GPIO configuration

#define HAVE_GPIO_T
 Override the default gpio_t type definition. More...
typedef unsigned int gpio_t

Predefined GPIO names

#define GPIO0   (GPIO_PIN(PORT_GPIO,0))
#define GPIO1   (GPIO_PIN(PORT_GPIO,1))
#define GPIO2   (GPIO_PIN(PORT_GPIO,2))
#define GPIO3   (GPIO_PIN(PORT_GPIO,3))
#define GPIO4   (GPIO_PIN(PORT_GPIO,4))
#define GPIO5   (GPIO_PIN(PORT_GPIO,5))
#define GPIO6   (GPIO_PIN(PORT_GPIO,6))
#define GPIO7   (GPIO_PIN(PORT_GPIO,7))
#define GPIO8   (GPIO_PIN(PORT_GPIO,8))
#define GPIO9   (GPIO_PIN(PORT_GPIO,9))
#define GPIO10   (GPIO_PIN(PORT_GPIO,10))
#define GPIO11   (GPIO_PIN(PORT_GPIO,11))
#define GPIO12   (GPIO_PIN(PORT_GPIO,12))
#define GPIO13   (GPIO_PIN(PORT_GPIO,13))
#define GPIO14   (GPIO_PIN(PORT_GPIO,14))
#define GPIO15   (GPIO_PIN(PORT_GPIO,15))
#define GPIO16   (GPIO_PIN(PORT_GPIO,16))

I2C configuration

ESP8266 provides up to two bit-banging I2C interfaces.

The board-specific configuration of the I2C interface I2C_DEV(n) requires the definition of

I2Cn_SPEED, the bus speed, I2Cn_SCL, the GPIO used as SCL signal, and I2Cn_SDA, the GPIO used as SDA signal,

where n can be 0 or 1. If they are not defined, the I2C interface I2C_DEV(n) is not used.

The configuration of the I2C interfaces I2C_DEV(n) must be in continuous ascending order of n.

I2C_NUMOF is determined automatically from board-specific peripheral definitions of I2Cn_SPEED, I2Cn_SCK, and I2Cn_SDA.

#define I2C_NUMOF_MAX   (2)
 Maximum number of I2C interfaces that can be used by board definitions. More...
 i2c_read_reg required More...
 i2c_read_regs required More...
 i2c_write_reg required More...
 i2c_write_regs required More...

PWM configuration

The hardware implementation of ESP8266 PWM supports only frequencies as power of two.

Therefore a software implementation of one PWM device PWM_DEV(0) with up to 8 PWM channels (PWM_CHANNEL_NUM_MAX) is used. The GPIOs that can be used as PWM channels are defined by PWM0_GPIOS in board definition.

The minimum PWM period that can be realized is 10 us or 100.000 PWM clock cycles per second. Therefore, the product of frequency and resolution should not be greater than 100.000. Otherwise the frequency is scaled down automatically.
#define PWM_NUMOF_MAX   (1)
 Maximum number of PWM devices. More...
#define PWM_CHANNEL_NUM_MAX   (8)
 Maximum number of channels per PWM device. More...

RNG configuration

#define RNG_DATA_REG_ADDR   (0x3ff20e44)
 The address of the register for accessing the hardware RNG. More...

RTT and RTC configuration

#define RTT_FREQUENCY   (312500UL)

SPI configuration

ESP8266 has two SPI controllers:

  • CSPI for caching and accessing the flash memory
  • HSPI for peripherals

Thus, HSPI is the only SPI interface that is available for peripherals. It is exposed as RIOT's SPI_DEV(0). The pin configuration of the HSPI interface is fixed as shown in following table.

Signal Pin
SPI0_CS0 GPIOn with n = 0, 2, 4, 5, 15, 16 (additionally 9, 10 in DOUT flash mode)

The only pin definition that can be overridden by an application-specific board configuration is the CS signal defined by SPI0_CS0.

#define SPI_NUMOF_MAX   (1)
 Maximum number of SPI interfaces. More...
 requires function spi_transfer_byte More...
 requires function spi_transfer_reg More...
 requires function spi_transfer_regs More...
enum  spi_ctrl_t { HSPI = 1 }
 SPI controllers that can be used for peripheral interfaces. More...

UART configuration

All ESP8266 boards have exactly one UART device with fixed pin mapping.

#define UART_NUMOF_MAX   (2)
 Maximum number of UART interfaces. More...

Macro Definition Documentation


#define CPUID_LEN   (4U)

Length of the CPU_ID in octets.

Definition at line 35 of file periph_cpu.h.


#define GPIO0   (GPIO_PIN(PORT_GPIO,0))

Definition at line 94 of file periph_cpu.h.


#define GPIO1   (GPIO_PIN(PORT_GPIO,1))

Definition at line 95 of file periph_cpu.h.

◆ GPIO10

#define GPIO10   (GPIO_PIN(PORT_GPIO,10))

Definition at line 104 of file periph_cpu.h.

◆ GPIO11

#define GPIO11   (GPIO_PIN(PORT_GPIO,11))

Definition at line 105 of file periph_cpu.h.

◆ GPIO12

#define GPIO12   (GPIO_PIN(PORT_GPIO,12))

Definition at line 106 of file periph_cpu.h.

◆ GPIO13

#define GPIO13   (GPIO_PIN(PORT_GPIO,13))

Definition at line 107 of file periph_cpu.h.

◆ GPIO14

#define GPIO14   (GPIO_PIN(PORT_GPIO,14))

Definition at line 108 of file periph_cpu.h.

◆ GPIO15

#define GPIO15   (GPIO_PIN(PORT_GPIO,15))

Definition at line 109 of file periph_cpu.h.

◆ GPIO16

#define GPIO16   (GPIO_PIN(PORT_GPIO,16))

Definition at line 110 of file periph_cpu.h.


#define GPIO2   (GPIO_PIN(PORT_GPIO,2))

Definition at line 96 of file periph_cpu.h.


#define GPIO3   (GPIO_PIN(PORT_GPIO,3))

Definition at line 97 of file periph_cpu.h.


#define GPIO4   (GPIO_PIN(PORT_GPIO,4))

Definition at line 98 of file periph_cpu.h.


#define GPIO5   (GPIO_PIN(PORT_GPIO,5))

Definition at line 99 of file periph_cpu.h.


#define GPIO6   (GPIO_PIN(PORT_GPIO,6))

Definition at line 100 of file periph_cpu.h.


#define GPIO7   (GPIO_PIN(PORT_GPIO,7))

Definition at line 101 of file periph_cpu.h.


#define GPIO8   (GPIO_PIN(PORT_GPIO,8))

Definition at line 102 of file periph_cpu.h.


#define GPIO9   (GPIO_PIN(PORT_GPIO,9))

Definition at line 103 of file periph_cpu.h.


#define GPIO_PIN (   x,
)    ((x & 0) | y)

Define a CPU specific GPIO pin generator macro.

Definition at line 60 of file periph_cpu.h.


#define GPIO_PIN_NUMOF   (17)

Define CPU specific number of GPIO pins.

Definition at line 70 of file periph_cpu.h.


#define GPIO_UNDEF   ((gpio_t)(UINT_MAX))

Definition of a fitting UNDEF value.

Definition at line 55 of file periph_cpu.h.


#define HAVE_GPIO_T

Override the default gpio_t type definition.

This is required here to have gpio_t defined in this file.

Definition at line 48 of file periph_cpu.h.


#define I2C_NUMOF_MAX   (2)

Maximum number of I2C interfaces that can be used by board definitions.

Definition at line 165 of file periph_cpu.h.



i2c_read_reg required

Definition at line 167 of file periph_cpu.h.



i2c_read_regs required

Definition at line 168 of file periph_cpu.h.



i2c_write_reg required

Definition at line 169 of file periph_cpu.h.



i2c_write_regs required

Definition at line 170 of file periph_cpu.h.



requires function spi_transfer_byte

Definition at line 278 of file periph_cpu.h.



requires function spi_transfer_reg

Definition at line 279 of file periph_cpu.h.



requires function spi_transfer_regs

Definition at line 280 of file periph_cpu.h.



Prevent shared timer functions from being used.

Definition at line 286 of file periph_cpu.h.


#define PORT_GPIO   (0)

Available GPIO ports on ESP8266.

Definition at line 65 of file periph_cpu.h.



Definition at line 179 of file periph_cpu.h.



Definition at line 178 of file periph_cpu.h.



Definition at line 177 of file periph_cpu.h.


#define PWM_CHANNEL_NUM_MAX   (8)

Maximum number of channels per PWM device.

Definition at line 207 of file periph_cpu.h.


#define PWM_NUMOF_MAX   (1)

Maximum number of PWM devices.

Definition at line 202 of file periph_cpu.h.


#define RNG_DATA_REG_ADDR   (0x3ff20e44)

The address of the register for accessing the hardware RNG.

Definition at line 219 of file periph_cpu.h.


#define RTT_FREQUENCY   (312500UL)

Definition at line 226 of file periph_cpu.h.



Definition at line 227 of file periph_cpu.h.


#define SPI_NUMOF_MAX   (1)

Maximum number of SPI interfaces.

Definition at line 276 of file periph_cpu.h.


#define UART_NUMOF_MAX   (2)

Maximum number of UART interfaces.

Definition at line 307 of file periph_cpu.h.

Typedef Documentation

◆ gpio_t

typedef unsigned int gpio_t

Definition at line 49 of file periph_cpu.h.

Enumeration Type Documentation

◆ spi_ctrl_t

enum spi_ctrl_t

SPI controllers that can be used for peripheral interfaces.


HSPI interface controller.

Definition at line 258 of file periph_cpu.h.