- Generated on Sat Dec 21 2024 20:58:11 by
1.9.8
Register and bit definitions for the MPU-9X50 (MPU9150 and MPU9250) 9-Axis Motion Sensor. More...
Register and bit definitions for the MPU-9X50 (MPU9150 and MPU9250) 9-Axis Motion Sensor.
Definition in file mpu9x50_regs.h.
Go to the source code of this file.
Compass register definitions | |
| #define | COMPASS_WHOAMI_REG (0x00) |
| #define | COMPASS_ST1_REG (0x02) |
| #define | COMPASS_DATA_START_REG (0x03) |
| #define | COMPASS_ST2_REG (0x09) |
| #define | COMPASS_CNTL_REG (0x0A) |
| #define | COMPASS_ASTC_REG (0x0C) |
| #define | COMPASS_ASAX_REG (0x10) |
| #define | COMPASS_ASAY_REG (0x11) |
| #define | COMPASS_ASAZ_REG (0x12) |
MPU9X50 bitfield definitions | |
| #define | BIT_SLV0_DELAY_EN (0x01) |
| #define | BIT_SLV1_DELAY_EN (0x02) |
| #define | BIT_I2C_BYPASS_EN (0x02) |
| #define | BIT_I2C_MST_EN (0x20) |
| #define | BIT_PWR_MGMT1_SLEEP (0x40) |
| #define | BIT_WAIT_FOR_ES (0x40) |
| #define | BIT_I2C_MST_VDDIO (0x80) |
| #define | BIT_SLAVE_RW (0x80) |
| #define | BIT_SLAVE_EN (0x80) |
| #define | BIT_DMP_EN (0x80) |
| #define BIT_DMP_EN (0x80) |
Definition at line 96 of file mpu9x50_regs.h.
| #define BIT_I2C_BYPASS_EN (0x02) |
Definition at line 89 of file mpu9x50_regs.h.
| #define BIT_I2C_MST_EN (0x20) |
Definition at line 90 of file mpu9x50_regs.h.
| #define BIT_I2C_MST_VDDIO (0x80) |
Definition at line 93 of file mpu9x50_regs.h.
| #define BIT_PWR_MGMT1_SLEEP (0x40) |
Definition at line 91 of file mpu9x50_regs.h.
| #define BIT_SLAVE_EN (0x80) |
Definition at line 95 of file mpu9x50_regs.h.
| #define BIT_SLAVE_RW (0x80) |
Definition at line 94 of file mpu9x50_regs.h.
| #define BIT_SLV0_DELAY_EN (0x01) |
Definition at line 87 of file mpu9x50_regs.h.
| #define BIT_SLV1_DELAY_EN (0x02) |
Definition at line 88 of file mpu9x50_regs.h.
| #define BIT_WAIT_FOR_ES (0x40) |
Definition at line 92 of file mpu9x50_regs.h.
| #define COMPASS_ASAX_REG (0x10) |
Definition at line 78 of file mpu9x50_regs.h.
| #define COMPASS_ASAY_REG (0x11) |
Definition at line 79 of file mpu9x50_regs.h.
| #define COMPASS_ASAZ_REG (0x12) |
Definition at line 80 of file mpu9x50_regs.h.
| #define COMPASS_ASTC_REG (0x0C) |
Definition at line 77 of file mpu9x50_regs.h.
| #define COMPASS_CNTL_REG (0x0A) |
Definition at line 76 of file mpu9x50_regs.h.
| #define COMPASS_DATA_START_REG (0x03) |
Definition at line 74 of file mpu9x50_regs.h.
| #define COMPASS_ST1_REG (0x02) |
Definition at line 73 of file mpu9x50_regs.h.
| #define COMPASS_ST2_REG (0x09) |
Definition at line 75 of file mpu9x50_regs.h.
| #define COMPASS_WHOAMI_REG (0x00) |
Definition at line 72 of file mpu9x50_regs.h.
| #define MPU9X50_ACCEL_CFG_REG (0x1C) |
Definition at line 36 of file mpu9x50_regs.h.
| #define MPU9X50_ACCEL_START_REG (0x3B) |
Definition at line 50 of file mpu9x50_regs.h.
| #define MPU9X50_COMPASS_DATA_START_REG (0x4A) |
Definition at line 54 of file mpu9x50_regs.h.
| #define MPU9X50_DMP_INT_STATUS (0x39) |
Definition at line 48 of file mpu9x50_regs.h.
| #define MPU9X50_EXT_SENS_DATA_START_REG (0x49) |
Definition at line 53 of file mpu9x50_regs.h.
| #define MPU9X50_FIFO_COUNT_START_REG (0x72) |
Definition at line 63 of file mpu9x50_regs.h.
| #define MPU9X50_FIFO_EN_REG (0x23) |
Definition at line 37 of file mpu9x50_regs.h.
| #define MPU9X50_FIFO_RW_REG (0x74) |
Definition at line 64 of file mpu9x50_regs.h.
| #define MPU9X50_GYRO_CFG_REG (0x1B) |
Definition at line 35 of file mpu9x50_regs.h.
| #define MPU9X50_GYRO_START_REG (0x43) |
Definition at line 52 of file mpu9x50_regs.h.
| #define MPU9X50_I2C_DELAY_CTRL_REG (0x67) |
Definition at line 59 of file mpu9x50_regs.h.
| #define MPU9X50_I2C_MST_REG (0x24) |
Definition at line 38 of file mpu9x50_regs.h.
| #define MPU9X50_INT_ENABLE_REG (0x38) |
Definition at line 47 of file mpu9x50_regs.h.
| #define MPU9X50_INT_PIN_CFG_REG (0x37) |
Definition at line 46 of file mpu9x50_regs.h.
| #define MPU9X50_INT_STATUS (0x3A) |
Definition at line 49 of file mpu9x50_regs.h.
| #define MPU9X50_LPF_REG (0x1A) |
Definition at line 34 of file mpu9x50_regs.h.
| #define MPU9X50_PWR_MGMT_1_REG (0x6B) |
Definition at line 61 of file mpu9x50_regs.h.
| #define MPU9X50_PWR_MGMT_2_REG (0x6C) |
Definition at line 62 of file mpu9x50_regs.h.
| #define MPU9X50_RATE_DIV_REG (0x19) |
Definition at line 33 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE0_ADDR_REG (0x25) |
Definition at line 39 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE0_CTRL_REG (0x27) |
Definition at line 41 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE0_DATA_OUT_REG (0x63) |
Definition at line 55 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE0_REG_REG (0x26) |
Definition at line 40 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE1_ADDR_REG (0x28) |
Definition at line 42 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE1_CTRL_REG (0x2A) |
Definition at line 44 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE1_DATA_OUT_REG (0x64) |
Definition at line 56 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE1_REG_REG (0x29) |
Definition at line 43 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE2_DATA_OUT_REG (0x65) |
Definition at line 57 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE3_DATA_OUT_REG (0x66) |
Definition at line 58 of file mpu9x50_regs.h.
| #define MPU9X50_SLAVE4_CTRL_REG (0x34) |
Definition at line 45 of file mpu9x50_regs.h.
| #define MPU9X50_TEMP_START_REG (0x41) |
Definition at line 51 of file mpu9x50_regs.h.
| #define MPU9X50_USER_CTRL_REG (0x6A) |
Definition at line 60 of file mpu9x50_regs.h.
| #define MPU9X50_WHO_AM_I_REG (0x75) |
Definition at line 65 of file mpu9x50_regs.h.
| #define MPU9X50_YG_OFFS_TC_REG (0x01) |
Definition at line 32 of file mpu9x50_regs.h.
1.9.8