Internal PIO interface. More...
Internal PIO interface.
Definition in file pio.h.
 Include dependency graph for pio.h:
 Include dependency graph for pio.h:Go to the source code of this file.
| Data Structures | |
| struct | pio_gpio_init_t | 
| Type used to configure PIO gpios pins.  More... | |
| struct | pio_sm_ctrl_regs | 
| Internal state machine registers.  More... | |
| struct | pio_isr_vec | 
| PIO interrupt callbacks for FIFO interrupts.  More... | |
| struct | pio_isr_sm_vec | 
| PIO state machine interrupt callbacks for state machine interrupts.  More... | |
| struct | pio_program_conf | 
| PIO program configuration.  More... | |
| struct | pio_sm_clkdiv | 
| PIO clock configuration.  More... | |
| Macros | |
| #define | PIO_SM_CTRL_BASE(dev) | 
| State machine configuration registers. | |
| #define | PIO_SM_CLKDIV_MAX 65536 | 
| Maximum clock divider. | |
| #define | PIO_SM_MASK(sm) | 
| Convert state machine index to bitmask. | |
| #define | PIO_IRQ_MASK(irq) | 
| Convert IRQ index to bitmask. | |
| #define | PIO_IRQ_REL_MASK(irq, sm) | 
| Convert relative IRQ index to bitmask. | |
| Typedefs | |
| typedef struct pio_sm_ctrl_regs | pio_sm_ctrl_regs_t | 
| Internal state machine registers. | |
| typedef struct pio_isr_vec | pio_isr_vec_t | 
| PIO interrupt callbacks for FIFO interrupts. | |
| typedef struct pio_isr_sm_vec | pio_isr_sm_vec_t | 
| PIO state machine interrupt callbacks for state machine interrupts. | |
| typedef struct pio_program_conf | pio_program_conf_t | 
| PIO program configuration. | |
| typedef struct pio_sm_clkdiv | pio_sm_clkdiv_t | 
| PIO clock configuration. | |
| Enumerations | |
| enum | pio_irq_source_t { PIO_IRQ_SM_3 = PIO0_INTR_SM3_Msk , PIO_IRQ_SM_2 = PIO0_INTR_SM2_Msk , PIO_IRQ_SM_1 = PIO0_INTR_SM1_Msk , PIO_IRQ_SM_0 = PIO0_INTR_SM0_Msk , PIO_IRQ_TXNFULL_SM3 = PIO0_INTR_SM3_TXNFULL_Msk , PIO_IRQ_TXNFULL_SM2 = PIO0_INTR_SM2_TXNFULL_Msk , PIO_IRQ_TXNFULL_SM1 = PIO0_INTR_SM1_TXNFULL_Msk , PIO_IRQ_TXNFULL_SM0 = PIO0_INTR_SM0_TXNFULL_Msk , PIO_IRQ_RXNEMPTY_SM3 = PIO0_INTR_SM3_RXNEMPTY_Msk , PIO_IRQ_RXNEMPTY_SM2 = PIO0_INTR_SM2_RXNEMPTY_Msk , PIO_IRQ_RXNEMPTY_SM1 = PIO0_INTR_SM1_RXNEMPTY_Msk , PIO_IRQ_RXNEMPTY_SM0 = PIO0_INTR_SM0_RXNEMPTY_Msk , PIO_IRQ_ALL_SM , PIO_IRQ_ALL } | 
| PIO IRQ flags.  More... | |
| enum | pio_irq_line_t { PIO_IRQ_LINE_0 = 0 , PIO_IRQ_LINE_1 , PIO_IRQ_LINE_NUMOF } | 
| PIO interrupt lines.  More... | |
| enum | pio_sm_mask_t { PIO_SM0 = PIO_SM_MASK(0) , PIO_SM1 = PIO_SM_MASK(1) , PIO_SM2 = PIO_SM_MASK(2) , PIO_SM3 = PIO_SM_MASK(3) , PIO_SM_ALL } | 
| PIO state machine flags.  More... | |
| Functions | |
| static unsigned | pio_irq_rel_index (unsigned irq_abs, unsigned sm) | 
| Convert absolute IRQ index to relative IRQ index. | |
| static unsigned | pio_irq_rel_sm (unsigned irq_abs, unsigned irq_rel) | 
| Get state machine index from relative IRQ index. | |
| int | pio_sm_exec (pio_t pio, pio_sm_t sm, pio_instr_t inst) | 
| Execute a single instruction. | |
| void | pio_sm_exec_block (pio_t pio, pio_sm_t sm, pio_instr_t inst) | 
| Execute a single instruction. | |
| int | pio_write_program (pio_t pio, pio_program_t *prog, const pio_instr_t *instr) | 
| Write program instructions to their allocated location. | |
| void | pio_sm_reset (pio_t pio, pio_sm_t sm) | 
| Apply the default state machine configuration. | |
| void | pio_sm_restart (pio_t pio, pio_sm_t sm) | 
| Restart a state machine. | |
| void | pio_set_isr_vec (pio_t pio, pio_sm_t sm, const pio_isr_vec_t *vec) | 
| Set ISR callbacks for FIFO interrupts per state machine. | |
| void | pio_set_isr_sm_vec (pio_t pio, unsigned irq, const pio_isr_sm_vec_t *vec) | 
| Set ISR callbacks for state machine interrupts. | |
| void | pio_sm_set_out_pins (pio_t pio, pio_sm_t sm, gpio_t pin_base, unsigned pin_count) | 
| Configure which pins are writeable by an 'out pins' instruction. | |
| void | pio_sm_set_in_pins (pio_t pio, pio_sm_t sm, gpio_t pin_base) | 
| Configure the state machine input pin mapping. | |
| void | pio_sm_set_set_pins (pio_t pio, pio_sm_t sm, gpio_t pin_base, unsigned pin_count) | 
| Configure which pins are effected by a 'set pins' instructions. | |
| void | pio_sm_set_sideset_pins (pio_t pio, pio_sm_t sm, gpio_t pin_base) | 
| Set the first pin of a sequence of sideset count pins which are effected by sideset instructions. | |
| void | pio_sm_set_sideset_count (pio_t pio, pio_sm_t sm, unsigned pin_count, bool enable) | 
| Configure how many pins are sideset pins and whether a sideset is optional or required for every instruction. | |
| void | pio_sm_set_sideset_target (pio_t pio, pio_sm_t sm, bool pindir) | 
| Configure whether a sideset effects pins or pin directions. | |
| pio_sm_clkdiv_t | pio_sm_clkdiv (uint32_t f_hz) | 
| Create a clock divider struct. | |
| void | pio_sm_set_clkdiv (pio_t pio, pio_sm_t sm, pio_sm_clkdiv_t clk) | 
| Apply the clock configuration to a PIO. | |
| void | pio_sm_clkdiv_restart (pio_t pio, unsigned sm_mask) | 
| Restart the clock divider of several state machines. | |
| void | pio_sm_set_wrap (pio_t pio, pio_sm_t sm, unsigned prog_loc, uint8_t top, uint8_t bottom) | 
| Set program instruction wrap boundaries. | |
| void | pio_sm_set_jmp_pin (pio_t pio, pio_sm_t sm, gpio_t pin) | 
| Configure the pin on which to branch on a 'jmp pins' instruction. | |
| void | pio_sm_set_in_shift (pio_t pio, pio_sm_t sm, bool right, bool autopush, unsigned threshold) | 
| Configure the shift in behaviour of a state machine. | |
| void | pio_sm_set_out_shift (pio_t pio, pio_sm_t sm, bool right, bool autopull, unsigned threshold) | 
| Configure the shift out behaviour of a state machine. | |
| void | pio_sm_set_fifo_join_rx (pio_t pio, pio_sm_t sm) | 
| Join the TX FIFO to the RX FIFO. | |
| void | pio_sm_set_fifo_join_tx (pio_t pio, pio_sm_t sm) | 
| Join the RX FIFO to the TX FIFO. | |
| void | pio_sm_reset_fifos (pio_t pio, pio_sm_t sm) | 
| No joined FIFO. | |
| void | pio_sm_clear_fifos (pio_t pio, pio_sm_t sm) | 
| Drop all pending words in the tx and rx FIFO. | |
| void | pio_irq_enable (pio_t pio, pio_irq_line_t irq, pio_irq_source_t irq_mask) | 
| Enable PIO<pio>_IRQ<irq> interrupts. | |
| void | pio_irq_disable (pio_t pio, pio_irq_line_t irq, pio_irq_source_t irq_mask) | 
| Disable PIO<pio>_IRQ<irq> interrupts. | |
| int | pio_sm_transmit_word (pio_t pio, pio_sm_t sm, uint32_t word) | 
| Send one word to a state machine. | |
| void | pio_sm_transmit_word_block (pio_t pio, pio_sm_t sm, uint32_t word) | 
| Send one word to a state machine. | |
| void | pio_sm_transmit_words_block (pio_t pio, pio_sm_t sm, const uint32_t *words, unsigned count) | 
| Send countwords to a state machine. | |
| int | pio_sm_receive_word (pio_t pio, pio_sm_t sm, uint32_t *word) | 
| Receive a word from a state machine. | |
| void | pio_sm_receive_word_block (pio_t pio, pio_sm_t sm, uint32_t *word) | 
| Receive one word from a state machine. | |
| void | pio_sm_receive_words_block (pio_t pio, pio_sm_t sm, uint32_t *words, unsigned count) | 
| Receive words from a state machine. | |
| uint32_t | pio_irq_get (pio_t pio) | 
| Read interrupt flags. | |
| void | pio_irq_clear (pio_t pio, unsigned irq_flags) | 
| Clear interrupt flags. | |
| int | pio_sm_init_common (pio_t pio, pio_sm_t sm, const pio_program_t *prog, const pio_program_conf_t *conf) | 
| Apply common program configuration. | |
| void | pio_sm_set_pindirs_with_mask (pio_t pio, pio_sm_t sm, gpio_t values, gpio_t mask) | 
| Apply pin directions in valuesfor which the corresponding bit inmaskis set. | |
| void | pio_sm_set_pins_with_mask (pio_t pio, pio_sm_t sm, gpio_t values, gpio_t mask) | 
| Apply pin values in valuesfor which the corresponding bit inmaskis set. | |
| void | pio_sm_set_set_pins_init (pio_t pio, pio_sm_t sm, const pio_gpio_init_t *pin_init) | 
| Set pins affected by 'set pins' and 'set pindirs' instructions and initialize the pins as PIO pins and a state according to pin_init. | |
| void | pio_sm_set_out_pins_init (pio_t pio, pio_sm_t sm, const pio_gpio_init_t *pin_init) | 
| Set output pins affected by 'out pins', 'out pindirs' and 'mov pins' instructions and initialize the pins as PIO pins and a state according to pin_init. | |
| void | pio_sm_set_sideset_pins_init (pio_t pio, pio_sm_t sm, const pio_gpio_init_t *pin_init) | 
| Set pins affected by sideset instructions and initialize the pins as PIO pins and a state according to pin_init. | |
| void | pio_print_status (pio_t pio) | 
| Print status information about the FIFOs and programs. | |
| void | pio_print_debug (pio_t pio) | 
| Print debug information about the current state of this PIO. | |
| static void | pio_sm_clear_debug_txstall (pio_t pio, unsigned sm_mask) | 
| Clear TX stall debug flag. | |
| static void | pio_sm_clear_debug_txover (pio_t pio, unsigned sm_mask) | 
| Clear TX overflow debug flag. | |
| static void | pio_sm_clear_debug_rxunder (pio_t pio, unsigned sm_mask) | 
| Clear RX underflow debug flag. | |
| static void | pio_sm_clear_debug_rxstall (pio_t pio, unsigned sm_mask) | 
| Clear RX stall debug flag. | |
| static bool | pio_sm_tx_fifo_empty (pio_t pio, pio_sm_t sm) | 
| Check if TX FIFO is empty. | |
| static bool | pio_sm_tx_fifo_full (pio_t pio, pio_sm_t sm) | 
| Check if TX FIFO is full. | |
| static bool | pio_sm_rx_fifo_empty (pio_t pio, pio_sm_t sm) | 
| Check if RX FIFO is empty. | |
| static bool | pio_sm_rx_fifo_full (pio_t pio, pio_sm_t sm) | 
| Check if RX FIFO is full. | |
| #define | PIO_SM_NUMOF 4 | 
| Number of state machines per PIO. | |
| #define | PIO_INSTR_NUMOF 32 | 
| Maximum number of instructions per PIO. | |
| #define | PIO_IRQ_NUMOF 8 | 
| Number of interrupt flags per PIO. | |
| #define | PIO_GPIO_INIT_HIGH(pin) | 
| To be used to set the state of a PIO pin in pio_gpio_init_t::gpio_state to high. | |
| #define | PIO_GPIO_INIT_LOW(pin) | 
| To be used to set the state of a PIO pin in pio_gpio_init_t::gpio_state to low. | |
| #define | PIO_GPIO_INIT_OUT(pin) | 
| To be used to set the direction of a PIO pin in pio_gpio_init_t::gpio_state as output. | |
| #define | PIO_GPIO_INIT_IN(pin) | 
| To be used to set the direction of a PIO pin in pio_gpio_init_t::gpio_state as input. | |
| typedef uint16_t | pio_instr_t | 
| Type to represent the width of an instruction. | |
| PIO instruction set | |
| #define | PIO_INST_JMP (0u << 13) | 
| JMP opcode. | |
| #define | PIO_INST_JMP_MASK (7u << 13) | 
| JMP opcode mask. | |
| #define | PIO_INST_JMP_CONDITION_SHIFT 5 | 
| JMP condition shift position. | |
| #define | PIO_INST_JMP_CONDITION_MASK (7u << PIO_INST_JMP_CONDITION_SHIFT) | 
| JMP condition mask. | |
| #define | PIO_INST_JMP_ADDRESS_MASK (31u) | 
| JMP address mask. | |
| #define | PIO_INST_WAIT (1u << 13) | 
| WAIT opcode. | |
| #define | PIO_INST_WAIT_MASK (7u << 13) | 
| WAIT opcode mask. | |
| #define | PIO_INST_WAIT_POL_SHIFT 7 | 
| WAIT polarity shift position. | |
| #define | PIO_INST_WAIT_POL_MASK (1u << PIO_INST_WAIT_POL_SHIFT) | 
| WAIT polarity mask. | |
| #define | PIO_INST_WAIT_SOURCE_SHIFT 5 | 
| WAIT source shift positions. | |
| #define | PIO_INST_WAIT_SOURCE_MASK (3u << PIO_INST_WAIT_SOURCE_SHIFT) | 
| WAIT source mask. | |
| #define | PIO_INST_WAIT_INDEX_MASK (31u) | 
| WAIT index mask. | |
| #define | PIO_INST_IN (2u << 13) | 
| IN opcode. | |
| #define | PIO_INST_IN_MASK (7u << 13) | 
| IN opcode mask. | |
| #define | PIO_INST_IN_SOURCE_SHIFT 5 | 
| IN source shift position. | |
| #define | PIO_INST_IN_SOURCE_MASK (7u << PIO_INST_IN_SOURCE_SHIFT) | 
| IN source mask. | |
| #define | PIO_INST_IN_BIT_COUNT_MASK (31u) | 
| Number of bits to be shifted into the input shift register. | |
| #define | PIO_INST_OUT (3u << 13) | 
| OUT opcode. | |
| #define | PIO_INST_OUT_MASK (7u << 13) | 
| OUT opcode mask. | |
| #define | PIO_INST_OUT_DESTINATION_SHIFT 5 | 
| OUT destination shift position. | |
| #define | PIO_INST_OUT_DESTINATION_MASK (7u << PIO_INST_OUT_DESTINATION_SHIFT) | 
| OUT destination mask. | |
| #define | PIO_INST_OUT_BIT_COUNT_MASK (31u) | 
| Number of bits to be shifted out of the output shift register. | |
| #define | PIO_INST_PUSH (4u << 13) | 
| PUSH opcode. | |
| #define | PIO_INST_PUSH_MASK ((7u << 13) | (1u << 7) | 31u) | 
| PUSH opcode mask. | |
| #define | PIO_INST_PUSH_IF_FULL_SHIFT 6 | 
| PUSH if input shift register is full shift position. | |
| #define | PIO_INST_PUSH_IF_FULL_MASK (1u << PIO_INST_PUSH_IF_FULL_SHIFT) | 
| PUSH if input shift register is full mask. | |
| #define | PIO_INST_PUSH_BLOCK_SHIFT 5 | 
| PUSH if RX FIFO is not full shift position. | |
| #define | PIO_INST_PUSH_BLOCK_MASK (1u << PIO_INST_PUSH_BLOCK_SHIFT) | 
| PUSH if RX FIFO is not full mask. | |
| #define | PIO_INST_PULL ((4u << 13) | (1u << 7)) | 
| PULL opcode. | |
| #define | PIO_INST_PULL_MASK ((7u << 13) | (1u << 7) | 31u) | 
| PULL opcode mask. | |
| #define | PIO_INST_PULL_IF_EMPTY_SHIFT 6 | 
| PULL if output shift register is empty flag shift position. | |
| #define | PIO_INST_PULL_IF_EMPTY_MASK (1u << PIO_INST_PULL_IF_EMPTY_SHIFT) | 
| PULL if output shift register is empty mask. | |
| #define | PIO_INST_PULL_BLOCK_SHIFT 5 | 
| PULL if TX FIFO is not empty flag shift position. | |
| #define | PIO_INST_PULL_BLOCK_MASK (1u << PIO_INST_PULL_BLOCK_SHIFT) | 
| PULL if TX FIFO is not empty mask. | |
| #define | PIO_INST_MOV (5u << 13) | 
| MOV opcode. | |
| #define | PIO_INST_MOV_MASK (7u << 13) | 
| MOV opcode mask. | |
| #define | PIO_INST_MOV_DESTINATION_SHIFT 5 | 
| MOV destination shift position. | |
| #define | PIO_INST_MOV_DESTINATION_MASK (7u << PIO_INST_MOV_DESTINATION_SHIFT) | 
| MOV destination mask. | |
| #define | PIO_INST_MOV_OP_SHIFT 3 | 
| MOV operation shift position. | |
| #define | PIO_INST_MOV_OP_MASK (3u << PIO_INST_MOV_OP_SHIFT) | 
| MOV operation mask. | |
| #define | PIO_INST_MOV_SOURCE_SHIFT 0 | 
| MOV source shift position. | |
| #define | PIO_INST_MOV_SOURCE_MASK (7u) | 
| MOV source mask. | |
| #define | PIO_INST_IRQ (6u << 13) | 
| IRQ opcode. | |
| #define | PIO_INST_IRQ_MASK ((7u << 13) | (1u << 7)) | 
| IRQ opcode mask. | |
| #define | PIO_INST_IRQ_CLR_SHIFT 6 | 
| IRQ clear flag shift position. | |
| #define | PIO_INST_IRQ_CLR_MASK (1u << PIO_INST_IRQ_CLR_SHIFT) | 
| IRQ clear flag mask. | |
| #define | PIO_INST_IRQ_WAIT_SHIFT 5 | 
| IRQ wait until cleared flag shift position. | |
| #define | PIO_INST_IRQ_WAIT_MASK (1u << PIO_INST_IRQ_WAIT_SHIFT) | 
| IRQ wait until cleared flag mask. | |
| #define | PIO_INST_IRQ_INDEX_MASK (31u) | 
| IRQ index mask. | |
| #define | PIO_INST_SET (7u << 13) | 
| SET opcode. | |
| #define | PIO_INST_SET_MASK (7u << 13) | 
| SET opcode mask. | |
| #define | PIO_INST_SET_DESTINATION_SHIFT 5 | 
| SET destination shift position. | |
| #define | PIO_INST_SET_DESTINATION_MASK (7u << PIO_INST_SET_DESTINATION_SHIFT) | 
| SET destination mask. | |
| #define | PIO_INST_SET_DATA_MASK (31u) | 
| SET data mask. | |
| enum | pio_inst_jmp_cond_t { PIO_INST_JMP_COND_NONE = 0 , PIO_INST_JMP_COND_X_ZERO = 1 , PIO_INST_JMP_COND_X_DEC = 2 , PIO_INST_JMP_COND_Y_ZERO = 3 , PIO_INST_JMP_COND_Y_DEC = 4 , PIO_INST_JMP_COND_NOT_X_EQ_Y = 5 , PIO_INST_JMP_COND_PIN = 6 , PIO_INST_JMP_COND_NOT_OSR_EMPTY = 7 } | 
| JMP conditions.  More... | |
| enum | pio_inst_wait_pol_t { PIO_INST_WAIT_POL_LOW = 0 , PIO_INST_WAIT_POL_HIGH = 1 } | 
| WAIT polarities.  More... | |
| enum | pio_inst_wait_src_t { PIO_INST_WAIT_SRC_GPIO = 0 , PIO_INST_WAIT_SRC_PIN = 1 , PIO_INST_WAIT_SRC_IRQ = 2 } | 
| WAIT sources.  More... | |
| enum | pio_inst_in_src_t { PIO_INST_IN_SRC_PINS = 0 , PIO_INST_IN_SRC_X = 1 , PIO_INST_IN_SRC_Y = 2 , PIO_INST_IN_SRC_NULL = 3 , PIO_INST_IN_SRC_ISR = 6 , PIO_INST_IN_SRC_OSR = 7 } | 
| IN sources.  More... | |
| enum | pio_inst_out_dst_t { PIO_INST_OUT_DST_PINS = 0 , PIO_INST_OUT_DST_X = 1 , PIO_INST_OUT_DST_Y = 2 , PIO_INST_OUT_DST_NULL = 3 , PIO_INST_OUT_DST_PINDIRS = 4 , PIO_INST_OUT_DST_PC = 5 , PIO_INST_OUT_DST_ISR = 6 , PIO_INST_OUT_DST_EXEC = 7 } | 
| OUT destinations.  More... | |
| enum | pio_inst_mov_dst_t { PIO_INST_MOV_DST_PINS = 0 , PIO_INST_MOV_DST_X = 1 , PIO_INST_MOV_DST_Y = 2 , PIO_INST_MOV_DST_EXEC = 4 , PIO_INST_MOV_DST_PC = 5 , PIO_INST_MOV_DST_ISR = 6 , PIO_INST_MOV_DST_OSR = 7 } | 
| MOV destinations.  More... | |
| enum | pio_inst_mov_op_t { PIO_INST_MOV_OP_NONE = 0 , PIO_INST_MOV_OP_INVERT = 1 , PIO_INST_MOV_OP_REVERSE = 2 } | 
| MOV operation.  More... | |
| enum | pio_inst_mov_src_t { PIO_INST_MOV_SRC_PINS = 0 , PIO_INST_MOV_SRC_X = 1 , PIO_INST_MOV_SRC_Y = 2 , PIO_INST_MOV_SRC_NULL = 3 , PIO_INST_MOV_SRC_STATUS = 5 , PIO_INST_MOV_SRC_ISR = 6 , PIO_INST_MOV_SRC_OSR = 7 } | 
| MOV source.  More... | |
| enum | pio_inst_set_dst_t { PIO_INST_SET_DST_PINS = 0 , PIO_INST_SET_DST_X = 1 , PIO_INST_SET_DST_Y = 2 , PIO_INST_SET_DST_PINDIRS = 4 } | 
| SET destinations.  More... | |
| static pio_instr_t | pio_inst_jmp (pio_inst_jmp_cond_t condition, unsigned address) | 
| Construct a JMP instruction. | |
| static pio_instr_t | pio_inst_wait (pio_inst_wait_pol_t polarity, pio_inst_wait_src_t source, bool relative, unsigned index) | 
| Construct a WAIT instruction. | |
| static pio_instr_t | pio_inst_in (pio_inst_in_src_t source, unsigned bit_count) | 
| Construct an IN instruction. | |
| static pio_instr_t | pio_inst_out (pio_inst_out_dst_t destination, unsigned bit_count) | 
| Construct an OUT instruction. | |
| static pio_instr_t | pio_inst_push (bool if_full, bool block) | 
| Construct a PUSH instruction. | |
| static pio_instr_t | pio_inst_pull (bool if_empty, bool block) | 
| Construct a PULL instruction. | |
| static pio_instr_t | pio_inst_mov (pio_inst_mov_dst_t destination, pio_inst_mov_op_t operation, pio_inst_mov_src_t source) | 
| Construct a MOV instruction. | |
| static pio_instr_t | pio_inst_irq (bool clear, bool wait, bool relative, unsigned index) | 
| Construct an IRQ instruction. | |
| static pio_instr_t | pio_inst_set (pio_inst_set_dst_t destination, unsigned data) | 
| Construct a SET instruction. | |
| static pio_instr_t | pio_inst_delay_sideset (unsigned sideset, unsigned sideset_count, bool sideset_opt, unsigned delay) | 
| Encode the delay/sideset instruction field. | |
| #define PIO_GPIO_INIT_HIGH | ( | pin | ) | 
To be used to set the state of a PIO pin in pio_gpio_init_t::gpio_state to high.
| [in] | pin | GPIO pin relative to pio_gpio_init_t::gpio_base starting with 0 | 
| #define PIO_GPIO_INIT_IN | ( | pin | ) | 
To be used to set the direction of a PIO pin in pio_gpio_init_t::gpio_state as input.
| [in] | pin | GPIO pin relative to pio_gpio_init_t::gpio_base starting with 0 | 
| #define PIO_GPIO_INIT_LOW | ( | pin | ) | 
To be used to set the state of a PIO pin in pio_gpio_init_t::gpio_state to low.
| [in] | pin | GPIO pin relative to pio_gpio_init_t::gpio_base starting with 0 | 
| #define PIO_GPIO_INIT_OUT | ( | pin | ) | 
To be used to set the direction of a PIO pin in pio_gpio_init_t::gpio_state as output.
| [in] | pin | GPIO pin relative to pio_gpio_init_t::gpio_base starting with 0 | 
| #define PIO_INST_IN_BIT_COUNT_MASK (31u) | 
| #define PIO_INST_IN_SOURCE_MASK (7u << PIO_INST_IN_SOURCE_SHIFT) | 
| #define PIO_INST_IRQ_CLR_MASK (1u << PIO_INST_IRQ_CLR_SHIFT) | 
| #define PIO_INST_IRQ_CLR_SHIFT 6 | 
| #define PIO_INST_IRQ_MASK ((7u << 13) | (1u << 7)) | 
| #define PIO_INST_IRQ_WAIT_MASK (1u << PIO_INST_IRQ_WAIT_SHIFT) | 
| #define PIO_INST_IRQ_WAIT_SHIFT 5 | 
| #define PIO_INST_JMP_CONDITION_MASK (7u << PIO_INST_JMP_CONDITION_SHIFT) | 
| #define PIO_INST_JMP_CONDITION_SHIFT 5 | 
| #define PIO_INST_MOV_DESTINATION_MASK (7u << PIO_INST_MOV_DESTINATION_SHIFT) | 
| #define PIO_INST_MOV_DESTINATION_SHIFT 5 | 
| #define PIO_INST_MOV_OP_MASK (3u << PIO_INST_MOV_OP_SHIFT) | 
| #define PIO_INST_MOV_SOURCE_SHIFT 0 | 
| #define PIO_INST_OUT_BIT_COUNT_MASK (31u) | 
| #define PIO_INST_OUT_DESTINATION_MASK (7u << PIO_INST_OUT_DESTINATION_SHIFT) | 
| #define PIO_INST_OUT_DESTINATION_SHIFT 5 | 
| #define PIO_INST_PULL_BLOCK_MASK (1u << PIO_INST_PULL_BLOCK_SHIFT) | 
| #define PIO_INST_PULL_BLOCK_SHIFT 5 | 
| #define PIO_INST_PULL_IF_EMPTY_MASK (1u << PIO_INST_PULL_IF_EMPTY_SHIFT) | 
| #define PIO_INST_PULL_IF_EMPTY_SHIFT 6 | 
| #define PIO_INST_PULL_MASK ((7u << 13) | (1u << 7) | 31u) | 
| #define PIO_INST_PUSH_BLOCK_MASK (1u << PIO_INST_PUSH_BLOCK_SHIFT) | 
| #define PIO_INST_PUSH_BLOCK_SHIFT 5 | 
| #define PIO_INST_PUSH_IF_FULL_MASK (1u << PIO_INST_PUSH_IF_FULL_SHIFT) | 
| #define PIO_INST_PUSH_IF_FULL_SHIFT 6 | 
| #define PIO_INST_PUSH_MASK ((7u << 13) | (1u << 7) | 31u) | 
| #define PIO_INST_SET_DESTINATION_MASK (7u << PIO_INST_SET_DESTINATION_SHIFT) | 
| #define PIO_INST_SET_DESTINATION_SHIFT 5 | 
| #define PIO_INST_WAIT_POL_MASK (1u << PIO_INST_WAIT_POL_SHIFT) | 
| #define PIO_INST_WAIT_POL_SHIFT 7 | 
| #define PIO_INST_WAIT_SOURCE_MASK (3u << PIO_INST_WAIT_SOURCE_SHIFT) | 
| #define PIO_INST_WAIT_SOURCE_SHIFT 5 | 
| #define PIO_INSTR_NUMOF 32 | 
| #define PIO_IRQ_MASK | ( | irq | ) | 
| #define PIO_IRQ_REL_MASK | ( | irq, | |
| sm ) | 
Convert relative IRQ index to bitmask.
| #define PIO_SM_CTRL_BASE | ( | dev | ) | 
State machine configuration registers.
| #define PIO_SM_MASK | ( | sm | ) | 
| typedef uint16_t pio_instr_t | 
| enum pio_inst_in_src_t | 
| enum pio_inst_jmp_cond_t | 
JMP conditions.
| enum pio_inst_mov_dst_t | 
MOV destinations.
| enum pio_inst_mov_op_t | 
| enum pio_inst_mov_src_t | 
MOV source.
| enum pio_inst_out_dst_t | 
OUT destinations.
| enum pio_inst_set_dst_t | 
| enum pio_inst_wait_pol_t | 
| enum pio_inst_wait_src_t | 
| enum pio_irq_line_t | 
| enum pio_irq_source_t | 
PIO IRQ flags.
| enum pio_sm_mask_t | 
| 
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Encode the delay/sideset instruction field.
| [in] | sideset | Sideset value to write to sideset pins | 
| [in] | sideset_count | Number of sideset pins | 
| [in] | sideset_opt | If sideset is optional | 
| [in] | delay | Delay cycles | 
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| void pio_irq_clear | ( | pio_t | pio, | 
| unsigned | irq_flags ) | 
Clear interrupt flags.
| [in] | pio | PIO index | 
| [in] | irq_flags | Interrupt flags to clear | 
| void pio_irq_disable | ( | pio_t | pio, | 
| pio_irq_line_t | irq, | ||
| pio_irq_source_t | irq_mask ) | 
Disable PIO<pio>_IRQ<irq> interrupts.
| [in] | pio | PIO index | 
| [in] | irq | PIO IRQ line to use | 
| [in] | irq_mask | IRQ flags to disable | 
| void pio_irq_enable | ( | pio_t | pio, | 
| pio_irq_line_t | irq, | ||
| pio_irq_source_t | irq_mask ) | 
Enable PIO<pio>_IRQ<irq> interrupts.
| [in] | pio | PIO index | 
| [in] | irq | PIO IRQ line to use | 
| [in] | irq_mask | IRQ flags to enable | 
| uint32_t pio_irq_get | ( | pio_t | pio | ) | 
Read interrupt flags.
| [in] | pio | PIO index | 
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Convert absolute IRQ index to relative IRQ index.
A relative state machine interrupt instruction (see datasheet 3.4.9 IRQ) raises a certain flag in the IRQ register. The following table shows the values of the IRQ register for all combinations of interrupts and state machines. This allows that a program running on different state machines to raise a different IRQ flag. There are 8 PIO IRQ flags but only the lower 4 IRQ flags are cached by NVIC.
* +--------+---------------------------+---------------------------+---------------------------+---------------------------+ * | | SM 0 | SM 1 | SM 2 | SM 3 | * | | IRQ indice | irq register | IRQ indice | irq register | IRQ indice | IRQ register | IRQ indice | IRQ register | * +--------+---------------------------+---------------------------+---------------------------+---------------------------+ * | IRQ 0 | 0 | 0b00000001 | 1 | 0b00000010 | 2 | 0b00000100 | 3 | 0b00001000 | * | IRQ 1 | 1 | 0b00000010 | 2 | 0b00000100 | 3 | 0b00001000 | 0 | 0b00000001 | * | IRQ 2 | 2 | 0b00000100 | 3 | 0b00001000 | 0 | 0b00000001 | 1 | 0b00000010 | * | IRQ 3 | 3 | 0b00001000 | 0 | 0b00000001 | 1 | 0b00000010 | 2 | 0b00000100 | * +--------+------------+--------------+------------+--------------+------------+--------------+------------+--------------| * | IRQ 4 | 4 | 0b00010000 | 5 | 0b00100000 | 6 | 0b01000000 | 7 | 0b10000000 | * | IRQ 5 | 5 | 0b00100000 | 6 | 0b01000000 | 7 | 0b10000000 | 4 | 0b00010000 | * | IRQ 6 | 6 | 0b01000000 | 7 | 0b10000000 | 4 | 0b00010000 | 5 | 0b00100000 | * | IRQ 7 | 7 | 0b10000000 | 4 | 0b00010000 | 5 | 0b00100000 | 6 | 0b01000000 | * +--------+------------+--------------+------------+--------------+------------+--------------+------------+--------------+ *
| [in] | irq_abs | Absolute PIO IRQ index [0-7] | 
| [in] | sm | PIO state machine index | 
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| void pio_print_debug | ( | pio_t | pio | ) | 
Print debug information about the current state of this PIO.
| [in] | pio | PIO index | 
| void pio_print_status | ( | pio_t | pio | ) | 
Print status information about the FIFOs and programs.
| [in] | pio | PIO index | 
| void pio_set_isr_sm_vec | ( | pio_t | pio, | 
| unsigned | irq, | ||
| const pio_isr_sm_vec_t * | vec ) | 
Set ISR callbacks for state machine interrupts.
| [in] | pio | PIO index | 
| [in] | irq | PIO IRQ index [0-3] or use pio_irq_rel_index | 
| [in] | vec | State machine ISR callback vector | 
| void pio_set_isr_vec | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| const pio_isr_vec_t * | vec ) | 
Set ISR callbacks for FIFO interrupts per state machine.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | vec | FIFO ISR callback vector | 
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Drop all pending words in the tx and rx FIFO.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| pio_sm_clkdiv_t pio_sm_clkdiv | ( | uint32_t | f_hz | ) | 
Create a clock divider struct.
f_hz would be greater than PIO_SM_CLKDIV_MAX, an assert is fired.| [in] | f_hz | Desired PIO frequency | 
| void pio_sm_clkdiv_restart | ( | pio_t | pio, | 
| unsigned | sm_mask ) | 
Restart the clock divider of several state machines.
This is useful if several state machines must be synchronized and to resync after the clock divider has been changed on-the-fly.
| [in] | pio | PIO index | 
| [in] | sm_mask | PIO state machine mask pio_sm_mask_t | 
| int pio_sm_exec | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| pio_instr_t | inst ) | 
Execute a single instruction.
This function does not wait until the instruction has completed. The instruction is written to SMx INSTR register and is immediately executed, interrupting other execution.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | inst | Instruction to be executed | 
| void pio_sm_exec_block | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| pio_instr_t | inst ) | 
Execute a single instruction.
This function blocks until the instruction has completed. The instruction is written to SMx INSTR register and is immediately executed, interrupting other execution.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | inst | Instruction to be executed | 
| int pio_sm_init_common | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| const pio_program_t * | prog, | ||
| const pio_program_conf_t * | conf ) | 
Apply common program configuration.
This function should be called before any specific program parameters are set because the state machine is reset first.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | prog | Program | 
| [in] | conf | Program configuration | 
Receive a word from a state machine.
This function does not block but returns a negative integer if there is no data.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [out] | word | Destination to store the received word | 
Receive one word from a state machine.
This function blocks until one word has been received.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [out] | word | Destination to store the received word | 
Receive words from a state machine.
This function blocks until count words have been received.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [out] | words | Buffer to store received words | 
| [in] | count | Number of words | 
Apply the default state machine configuration.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
No joined FIFO.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
Restart a state machine.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| void pio_sm_set_clkdiv | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| pio_sm_clkdiv_t | clk ) | 
Apply the clock configuration to a PIO.
There is an integer and a fractional portion of the clock divider. The fractional parameter is in 1/100. That means 90 means .90 and 9 means .09. The PIOs are running from the system clock.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | clk | Clock configuration | 
Join the TX FIFO to the RX FIFO.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
Join the RX FIFO to the TX FIFO.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
Configure the state machine input pin mapping.
The pin sequence wraps around after the maximum pin.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_base | First pin of a pin sequence effected by an in instruction | 
Configure the shift in behaviour of a state machine.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | right | Whether to shift right instead of left | 
| [in] | autopush | Whether to automatically push on reached threshold | 
| [in] | threshold | In shift threshold | 
Configure the pin on which to branch on a 'jmp pins' instruction.
The jump is executed if the pin is high.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin | Branch pin | 
Configure which pins are writeable by an 'out pins' instruction.
The pins start at pin_base and are pin_count many. The pin sequence wraps around after the maximum pin.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_base | First pin of a pin sequence effected by an out instruction | 
| [in] | pin_count | Number of out pins | 
| void pio_sm_set_out_pins_init | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| const pio_gpio_init_t * | pin_init ) | 
Set output pins affected by 'out pins', 'out pindirs' and 'mov pins' instructions and initialize the pins as PIO pins and a state according to pin_init. 
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_init | GPIO pin initialization values | 
Configure the shift out behaviour of a state machine.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | right | Whether to shift right instead of left | 
| [in] | autopull | Whether to automatically pull on reached threshold | 
| [in] | threshold | Out shift threshold | 
Apply pin directions in values for which the corresponding bit in mask is set. 
1 means output, 0 means input.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | values | Pin directions out/in to be set | 
| [in] | mask | Mask of which pins should be modified | 
Apply pin values in values for which the corresponding bit in mask is set. 
1 means high, 0 means low.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | values | Pin values on/off to be set | 
| [in] | mask | Mask of which pins should be modified | 
Configure which pins are effected by a 'set pins' instructions.
The pins start at pin_base and are pin_count many. The pin sequence wraps around after the maximum pin.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_base | First pin of a pin sequence effected by a set instruction | 
| [in] | pin_count | Number of set pins | 
| void pio_sm_set_set_pins_init | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| const pio_gpio_init_t * | pin_init ) | 
Set pins affected by 'set pins' and 'set pindirs' instructions and initialize the pins as PIO pins and a state according to pin_init. 
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_init | GPIO pin initialization values | 
Configure how many pins are sideset pins and whether a sideset is optional or required for every instruction.
Each sideset pin occupies one bit of the delay field of an instruction. If sidesets are optional, one more bit is used.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_count | Number of pins effected by a sideset instruction | 
| [in] | enable | Whether the sideset is optional | 
Set the first pin of a sequence of sideset count pins which are effected by sideset instructions.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_base | First pin of a pin sequence effected by a sideset instruction | 
| void pio_sm_set_sideset_pins_init | ( | pio_t | pio, | 
| pio_sm_t | sm, | ||
| const pio_gpio_init_t * | pin_init ) | 
Set pins affected by sideset instructions and initialize the pins as PIO pins and a state according to pin_init. 
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pin_init | GPIO pin initialization values | 
Configure whether a sideset effects pins or pin directions.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | pindir | Whether the sideset effects pin directions | 
Set program instruction wrap boundaries.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | prog_loc | Program location | 
| [in] | top | wrap from | 
| [in] | bottom | wrap to | 
Send one word to a state machine.
This function does not block but returns a negative integer if the FIFO is fill.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | word | Word to transmit | 
Send one word to a state machine.
This function blocks until one word has been sent.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | word | Word to transmit | 
Send count words to a state machine. 
This function blocks until count words have been sent.
| [in] | pio | PIO index | 
| [in] | sm | PIO state machine index | 
| [in] | words | Words to transmit | 
| [in] | count | Number of words | 
| int pio_write_program | ( | pio_t | pio, | 
| pio_program_t * | prog, | ||
| const pio_instr_t * | instr ) | 
Write program instructions to their allocated location.
| [in] | pio | PIO index | 
| [in,out] | prog | PIO program to write | 
| [in] | instr | Program instructions |