Configuration of CPU peripherals for STM32F746G-DISCO board. More...

Detailed Description

Configuration of CPU peripherals for STM32F746G-DISCO board.

Author: Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include <stdint.h>
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#include "cfg_usb_otg_fs.h"
#include "mii.h"

Include dependency graph for periph_conf.h:

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Go to the source code of this file.

#define	CONFIG_BOARD_HAS_LSE 1

#define	CONFIG_BOARD_HAS_HSE 1

#define	CONFIG_CLOCK_HSE MHZ(25)

DMA streams configuration
#define	DMA_0_ISR isr_dma2_stream7

#define	DMA_1_ISR isr_dma2_stream6

#define	DMA_2_ISR isr_dma1_stream6

#define	DMA_3_ISR isr_dma2_stream2

#define	DMA_4_ISR isr_dma2_stream5

#define	DMA_5_ISR isr_dma2_stream3

#define	DMA_6_ISR isr_dma2_stream4

#define	DMA_7_ISR isr_dma2_stream0

#define	DMA_NUMOF ARRAY_SIZE(dma_config)

static const dma_conf_t	dma_config []

UART configuration
#define	UART_0_ISR (isr_usart1)

#define	UART_0_DMA_ISR (isr_dma2_stream7)

#define	UART_6_ISR (isr_usart6)

#define	UART_6_DMA_ISR (isr_dma2_stream6)

#define	UART_NUMOF ARRAY_SIZE(uart_config)

static const uart_conf_t	uart_config []

SPI configuration
#define	SPI_NUMOF ARRAY_SIZE(spi_config)

static const spi_conf_t	spi_config []

I2C configuration
#define	I2C_0_ISR isr_i2c1_er

#define	I2C_1_ISR isr_i2c3_er

#define	I2C_NUMOF ARRAY_SIZE(i2c_config)

static const i2c_conf_t	i2c_config []

ETH configuration
#define	ETH_DMA_ISR isr_dma2_stream0

static const eth_conf_t	eth_config

USB OTG FS configuration using ULPI HS PHY
The USB OTG HS peripheral uses a ULPI HS PHY. The configuration of the ULPI HS PHY interface is board-specific.
#define	DWC2_USB_OTG_HS_ENABLED
	Enable the high speed USB OTG peripheral.

#define	USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
	Number of available USB OTG peripherals.

static const dwc2_usb_otg_fshs_config_t	dwc2_usb_otg_fshs_config []
	Common USB OTG HS configuration with ULPI HS PHY.

FMC configuration
#define	FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config)
	Number of configured FMC banks.

static const fmc_conf_t	fmc_config
	FMC controller configuration.

static const fmc_bank_conf_t	fmc_bank_config []
	FMC Bank configuration.

SDIO/SDMMC configuration
#define	SDMMC_CONFIG_NUMOF 1
	Number of configured SDIO/SDMMC peripherals.

static const sdmmc_conf_t	sdmmc_config []
	SDIO/SDMMC static configuration struct.

LTDC configuration
static const ltdc_conf_t	ltdc_config
	LTDC static configuration struct.

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_HSE

#define CONFIG_BOARD_HAS_HSE 1

Definition at line 29 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE 1

Definition at line 24 of file periph_conf.h.

◆ CONFIG_CLOCK_HSE

#define CONFIG_CLOCK_HSE MHZ(25)

Definition at line 34 of file periph_conf.h.

◆ DMA_0_ISR

#define DMA_0_ISR isr_dma2_stream7

Definition at line 69 of file periph_conf.h.

◆ DMA_1_ISR

#define DMA_1_ISR isr_dma2_stream6

Definition at line 70 of file periph_conf.h.

◆ DMA_2_ISR

#define DMA_2_ISR isr_dma1_stream6

Definition at line 71 of file periph_conf.h.

◆ DMA_3_ISR

#define DMA_3_ISR isr_dma2_stream2

Definition at line 73 of file periph_conf.h.

◆ DMA_4_ISR

#define DMA_4_ISR isr_dma2_stream5

Definition at line 74 of file periph_conf.h.

◆ DMA_5_ISR

#define DMA_5_ISR isr_dma2_stream3

Definition at line 75 of file periph_conf.h.

◆ DMA_6_ISR

#define DMA_6_ISR isr_dma2_stream4

Definition at line 76 of file periph_conf.h.

◆ DMA_7_ISR

#define DMA_7_ISR isr_dma2_stream0

Definition at line 78 of file periph_conf.h.

◆ DMA_NUMOF

#define DMA_NUMOF ARRAY_SIZE(dma_config)

Definition at line 80 of file periph_conf.h.

◆ DWC2_USB_OTG_HS_ENABLED

#define DWC2_USB_OTG_HS_ENABLED

Enable the high speed USB OTG peripheral.

Definition at line 288 of file periph_conf.h.

◆ ETH_DMA_ISR

#define ETH_DMA_ISR isr_dma2_stream0

Definition at line 215 of file periph_conf.h.

◆ FMC_BANK_NUMOF

#define FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config)

Number of configured FMC banks.

Definition at line 431 of file periph_conf.h.

◆ I2C_0_ISR

#define I2C_0_ISR isr_i2c1_er

Definition at line 186 of file periph_conf.h.

◆ I2C_1_ISR

#define I2C_1_ISR isr_i2c3_er

Definition at line 187 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF ARRAY_SIZE(i2c_config)

Definition at line 189 of file periph_conf.h.

◆ SDMMC_CONFIG_NUMOF

#define SDMMC_CONFIG_NUMOF 1

Number of configured SDIO/SDMMC peripherals.

Definition at line 467 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF ARRAY_SIZE(spi_config)

Definition at line 152 of file periph_conf.h.

◆ UART_0_DMA_ISR

#define UART_0_DMA_ISR (isr_dma2_stream7)

Definition at line 119 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR (isr_usart1)

Definition at line 118 of file periph_conf.h.

◆ UART_6_DMA_ISR

#define UART_6_DMA_ISR (isr_dma2_stream6)

Definition at line 121 of file periph_conf.h.

◆ UART_6_ISR

#define UART_6_ISR (isr_usart6)

Definition at line 120 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF ARRAY_SIZE(uart_config)

Definition at line 123 of file periph_conf.h.

◆ USBDEV_NUMOF

#define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)

Number of available USB OTG peripherals.

Definition at line 320 of file periph_conf.h.

Variable Documentation

◆ dma_config

const dma_conf_t dma_config[]

static

Initial value:

= {
    { .stream = 15 },   
    { .stream = 14 },   
    { .stream = 6 },    
    { .stream = 3 },    
    { .stream = 4 },    
    { .stream = 11 },   
    { .stream = 12 },   
    { .stream = 8 },    
}

Definition at line 58 of file periph_conf.h.

◆ dwc2_usb_otg_fshs_config

const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[]

static

Initial value:

= {
    {
        .periph   = USB_OTG_HS_PERIPH_BASE,
        .type     = DWC2_USB_OTG_HS,
        .phy      = DWC2_USB_OTG_PHY_ULPI,
        .rcc_mask = RCC_AHB1ENR_OTGHSEN,
        .irqn     = OTG_HS_IRQn,
        .ahb      = AHB1,
        .ulpi_af  = GPIO_AF10,
        .ulpi_clk = GPIO_PIN(PORT_A, 5),
        .ulpi_d0  = GPIO_PIN(PORT_A, 3),
        .ulpi_d1  = GPIO_PIN(PORT_B, 0),
        .ulpi_d2  = GPIO_PIN(PORT_B, 1),
        .ulpi_d3  = GPIO_PIN(PORT_B, 10),
        .ulpi_d4  = GPIO_PIN(PORT_B, 11),
        .ulpi_d5  = GPIO_PIN(PORT_B, 12),
        .ulpi_d6  = GPIO_PIN(PORT_B, 13),
        .ulpi_d7  = GPIO_PIN(PORT_B, 5),
        .ulpi_dir = GPIO_PIN(PORT_C, 2),
        .ulpi_stp = GPIO_PIN(PORT_C, 0),
        .ulpi_nxt = GPIO_PIN(PORT_H, 4),
    }
}

Common USB OTG HS configuration with ULPI HS PHY.

Definition at line 293 of file periph_conf.h.

◆ eth_config

const eth_conf_t eth_config

static

Initial value:

= {
    .mode = RMII,
    .speed = MII_BMCR_SPEED_100 | MII_BMCR_FULL_DPLX,
    .dma = 7,
    .dma_chan = 8,
    .phy_addr = 0x00,
    .pins = {
        GPIO_PIN(PORT_G, 13),   
        GPIO_PIN(PORT_G, 14),   
        GPIO_PIN(PORT_G, 11),   
        GPIO_PIN(PORT_C, 4),    
        GPIO_PIN(PORT_C, 5),    
        GPIO_PIN(PORT_A, 7),    
        GPIO_PIN(PORT_C, 1),    
        GPIO_PIN(PORT_A, 2),    
        GPIO_PIN(PORT_A, 1),    
    }
}

Definition at line 196 of file periph_conf.h.

◆ fmc_bank_config

const fmc_bank_conf_t fmc_bank_config[]

static

FMC Bank configuration.

The board has a SDRAM IS42S32400F-6BL with 128 MBit on-board. It is organized in 4 banks of 1M x 32 bits each and connected to bank 5 at address 0xc0000000.

Note: Since only D0 to D15 are connected and D16 to D31 are unused, 4 banks with only 1M x 16 bits and thus half the capacity (8 MByte) can be used.

Definition at line 394 of file periph_conf.h.

◆ fmc_config

const fmc_conf_t fmc_config

static

FMC controller configuration.

Definition at line 332 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]

static

Initial value:

= {
    {
        .dev            = I2C1,
        .speed          = I2C_SPEED_NORMAL,
        .scl_pin        = GPIO_PIN(PORT_B, 8),
        .sda_pin        = GPIO_PIN(PORT_B, 9),
        .scl_af         = GPIO_AF4,
        .sda_af         = GPIO_AF4,
        .bus            = APB1,
        .rcc_mask       = RCC_APB1ENR_I2C1EN,
        .rcc_sw_mask    = RCC_DCKCFGR2_I2C1SEL_1,
        .irqn           = I2C1_ER_IRQn,
    },
    {
        .dev            = I2C3,
        .speed          = I2C_SPEED_NORMAL,
        .scl_pin        = GPIO_PIN(PORT_H, 7),
        .sda_pin        = GPIO_PIN(PORT_H, 8),
        .scl_af         = GPIO_AF4,
        .sda_af         = GPIO_AF4,
        .bus            = APB1,
        .rcc_mask       = RCC_APB1ENR_I2C3EN,
        .rcc_sw_mask    = RCC_DCKCFGR2_I2C3SEL_1,
        .irqn           = I2C3_ER_IRQn,
    },
}

Definition at line 159 of file periph_conf.h.

◆ ltdc_config

const ltdc_conf_t ltdc_config

static

LTDC static configuration struct.

Definition at line 223 of file periph_conf.h.

◆ sdmmc_config

const sdmmc_conf_t sdmmc_config[]

static

Initial value:

= {
    {
        .dev = SDMMC1,
        .bus = APB2,
        .rcc_mask = RCC_APB2ENR_SDMMC1EN,
        .cd = GPIO_PIN(PORT_C, 13),
        .cd_active = 0,             
        .cd_mode = GPIO_IN_PU,      
        .clk = { GPIO_PIN(PORT_C, 12), GPIO_AF12 },
        .cmd = { GPIO_PIN(PORT_D,  2), GPIO_AF12 },
        .dat0 = { GPIO_PIN(PORT_C,  8), GPIO_AF12 },
        .dat1 = { GPIO_PIN(PORT_C,  9), GPIO_AF12 },
        .dat2 = { GPIO_PIN(PORT_C, 10), GPIO_AF12 },
        .dat3 = { GPIO_PIN(PORT_C, 11), GPIO_AF12 },
 
 
 
 
        .irqn = SDMMC1_IRQn
    },
}

SDIO/SDMMC static configuration struct.

Definition at line 442 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]

static

Initial value:

= {
    {
        .dev      = SPI2,
        .mosi_pin = GPIO_PIN(PORT_B, 15),
        .miso_pin = GPIO_PIN(PORT_B, 14),
        .sclk_pin = GPIO_PIN(PORT_I, 1),
        .cs_pin   = SPI_CS_UNDEF,
        .mosi_af  = GPIO_AF5,
        .miso_af  = GPIO_AF5,
        .sclk_af  = GPIO_AF5,
        .cs_af    = GPIO_AF5,
        .rccmask  = RCC_APB1ENR_SPI2EN,
        .apbbus   = APB1,
 
 
 
 
 
 
    },
}

Definition at line 130 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]

static

Initial value:

= {
    {
        .dev        = USART1,
        .rcc_mask   = RCC_APB2ENR_USART1EN,
        .rx_pin     = GPIO_PIN(PORT_B, 7),
        .tx_pin     = GPIO_PIN(PORT_A, 9),
        .rx_af      = GPIO_AF7,
        .tx_af      = GPIO_AF7,
        .bus        = APB2,
        .irqn       = USART1_IRQn,
 
 
 
 
    },
    {  
        .dev        = USART6,
        .rcc_mask   = RCC_APB2ENR_USART6EN,
        .rx_pin     = GPIO_PIN(PORT_C, 6),
        .tx_pin     = GPIO_PIN(PORT_C, 7),
        .rx_af      = GPIO_AF7,
        .tx_af      = GPIO_AF7,
        .bus        = APB2,
        .irqn       = USART6_IRQn,
 
 
 
 
    },
}

Definition at line 87 of file periph_conf.h.

Detailed Description

DMA streams configuration

UART configuration

SPI configuration

I2C configuration

ETH configuration

USB OTG FS configuration using ULPI HS PHY

FMC configuration

SDIO/SDMMC configuration

LTDC configuration

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_HSE

◆ CONFIG_BOARD_HAS_LSE

◆ CONFIG_CLOCK_HSE

◆ DMA_0_ISR

◆ DMA_1_ISR

◆ DMA_2_ISR

◆ DMA_3_ISR

◆ DMA_4_ISR

◆ DMA_5_ISR

◆ DMA_6_ISR

◆ DMA_7_ISR

◆ DMA_NUMOF

◆ DWC2_USB_OTG_HS_ENABLED

◆ ETH_DMA_ISR

◆ FMC_BANK_NUMOF

◆ I2C_0_ISR

◆ I2C_1_ISR

◆ I2C_NUMOF

◆ SDMMC_CONFIG_NUMOF

◆ SPI_NUMOF

◆ UART_0_DMA_ISR

◆ UART_0_ISR

◆ UART_6_DMA_ISR

◆ UART_6_ISR

◆ UART_NUMOF

◆ USBDEV_NUMOF

Variable Documentation

◆ dma_config

◆ dwc2_usb_otg_fshs_config

◆ eth_config

◆ fmc_bank_config

◆ fmc_config

◆ i2c_config

◆ ltdc_config

◆ sdmmc_config

◆ spi_config

◆ uart_config