Utilities. More...

Detailed Description

Utilities.

This module contains constants and helpers as library to help working with Ethernet PHYs connected via the Media-Independent Interface (MII) or the Reduced Media-Independent Interface (RMII)

Files
file	mii.h
	Interface definition for MII/RMII h.

Functions
static bool	mii_can_100_mbps_full_dp (uint16_t bmsr)
	Check if an Ethernet PHY supports 100 Mbps at full duplex.

static bool	mii_can_100_mbps_half_dp (uint16_t bmsr)
	Check if an Ethernet PHY supports 100 Mbps at half duplex.

static bool	mii_can_10_mbps_full_dp (uint16_t bmsr)
	Check if an Ethernet PHY supports 10 Mbps at full duplex.

static bool	mii_can_10_mbps_half_dp (uint16_t bmsr)
	Check if an Ethernet PHY supports 10 Mbps at half duplex.

Common MII Management Register Set
All registers except MII_BMCR and MII_BMSR are extended registers. Support for extended registers is indicated by the MII_BMSR_EXTENDED bit in the MII_BMSR register.
#define	MII_BMCR (0x00U)
	Basic mode control register.

#define	MII_BMSR (0x01U)
	Basic mode status register.

#define	MII_PHYID1 (0x02U)
	PHY Identifier 1.

#define	MII_PHYID2 (0x03U)
	PHY Identifier 2.

#define	MII_ADVERTISE (0x04U)
	Auto-Negotiation Advertisement.

#define	MII_LPA (0x05U)
	Link Parter Abilities.

#define	MII_EXPANSION (0x06U)
	Auto-Negotiation Expansion.

#define	MII_ESTATUS (0x0fU)
	Extended Status Register.

#define	MII_IRQ (0x1bU)
	Interrupt Control/Status.

Bits in the MII Basic Mode Control Register
#define	MII_BMCR_RESET BIT15
	Set to perform PHY reset.

#define	MII_BMCR_LOOP BIT14
	Set to enable loopback mode.

#define	MII_BMCR_AN_ENABLE BIT12
	Set to enable auto-negotiation.

#define	MII_BMCR_POWER_DOWN BIT11
	Set to power down PHY.

#define	MII_BMCR_ISOLATE BIT10
	Set to electrically isolate PHY from MII (PHY becomes inoperational)

#define	MII_BMCR_AN_RESTART BIT9
	Set to restart auto-negotiation.

#define	MII_BMCR_FULL_DPLX BIT8
	Set for full duplex.

#define	MII_BMCR_HALF_DPLX (0)
	Set for half duplex.

#define	MII_BMCR_COLL_TEST BIT7
	Set to enable collision signal test.

#define	MII_BMCR_SPEED_10 (0)
	Set speed to 10 Mbps.

#define	MII_BMCR_SPEED_100 BIT13
	Set speed to 100 Mbps.

#define	MII_BMCR_SPEED_1000 BIT6
	Set speed to 1 Gbps.

Bits in the MII Basic Mode Status Register
#define	MII_BMSR_100_T4 BIT15
	PHY supports 100BASE-T4 (half-duplex)

#define	MII_BMSR_100_TX_F BIT14
	PHY supports 100BASE-TX, full duplex.

#define	MII_BMSR_100_TX_H BIT13
	PHY supports 100BASE-TX, half duplex.

#define	MII_BMSR_10_F BIT12
	PHY supports 10BASE-T, full duplex.

#define	MII_BMSR_10_H BIT11
	PHY supports 10BASE-T, half duplex.

#define	MII_BMSR_100_T2_F BIT10
	PHY supports 100BASE-T2, full duplex.

#define	MII_BMSR_100_T2_H BIT9
	PHY supports 100BASE-T2, half duplex.

#define	MII_BMSR_ESTATUS BIT8
	Set, if MII_ESTATUS is available.

#define	MII_BMSR_AN_DONE BIT5
	Set when auto-negotiation is done.

#define	MII_BMSR_FAULT BIT4
	Set when remote fault condition is detected.

#define	MII_BMSR_HAS_AN BIT3
	Set if PHY can auto-negotiate.

#define	MII_BMSR_LINK BIT2
	Set if link is up.

#define	MII_BMSR_JABBER BIT1
	Set when jabber condition detected.

#define	MII_BMSR_EXTENDED BIT0
	Extended MII registers available.

Bits in the MII Extended Mode Advertisement Register
#define	MII_ADVERTISE_100_F BIT8
	Advertise 100BASE-T, full duplex.

#define	MII_ADVERTISE_100_H BIT7
	Advertise 100BASE-T, half duplex.

#define	MII_ADVERTISE_10_F BIT6
	Advertise 10BASE-T, full duplex.

#define	MII_ADVERTISE_10_H BIT5
	Advertise 10BASE-T, half duplex.

#define	MII_ADVERTISE_100 (BIT7 \| BIT8)
	Advertise 100BASE-T.

#define	MII_ADVERTISE_10 (BIT5 \| BIT6)
	Advertise 10BASE-T.

#define	MII_LPA_100_F BIT8
	Partner can 100BASE-T, full duplex.

#define	MII_LPA_100_H BIT7
	Partner can 100BASE-T, half duplex.

#define	MII_LPA_10_F BIT6
	Partner can 10BASE-T, full duplex.

#define	MII_LPA_10_H BIT5
	Partner can 10BASE-T, half duplex.

#define	MII_LPA_100 (BIT7 \| BIT8)
	Partner can 100BASE-T.

#define	MII_LPA_10 (BIT5 \| BIT6)
	Partner can 10BASE-T.

Bits in the MII Auto-Negotiation Expansion Register
#define	MII_LPA_HAS_AN BIT0
	Partner can auto-negotiate.

Bits in the MII Interrupt Control/Status Register
#define	MII_IRQ_LINK_UP BIT0
	Link-up occurred.

#define	MII_IRQ_RMT_FAULT BIT1
	Remote fault occurred.

#define	MII_IRQ_LINK_DOWN BIT2
	Link-down occurred.

#define	MII_IRQ_LPA_ACK BIT3
	Link partner acknowledge occurred.

#define	MII_IRQ_PD_FAULT BIT4
	Parallel detect fault occurred.

#define	MII_IRQ_PAGE_RX BIT5
	Page receive occurred.

#define	MII_IRQ_RX_ERROR BIT6
	Receive error occurred.

#define	MII_IRQ_JABBER BIT7
	Jabber occurred.

#define	MII_IRQ_EN_LINK_UP BIT8
	Enable Link-up occurred IRQ.

#define	MII_IRQ_EN_RMT_FAULT BIT9
	Enable Remote fault occurred IRQ.

#define	MII_IRQ_EN_LINK_DOWN BIT10
	Enable Link-down occurred IRQ.

#define	MII_IRQ_EN_LPA_ACK BIT11
	Enable Link partner acknowledge occurred IRQ.

#define	MII_IRQ_EN_PD_FAULT BIT12
	Enable Parallel detect fault occurred IRQ.

#define	MII_IRQ_EN_PAGE_RX BIT13
	Enable Page receive occurred IRQ.

#define	MII_IRQ_EN_RX_ERROR BIT14
	Enable Receive error occurred IRQ.

#define	MII_IRQ_EN_JABBER BIT15
	Enable Jabber occurred IRQ.

Macro Definition Documentation

◆ MII_ADVERTISE

#define MII_ADVERTISE (0x04U)

Auto-Negotiation Advertisement.

Definition at line 50 of file mii.h.

◆ MII_ADVERTISE_10

#define MII_ADVERTISE_10 (BIT5 | BIT6)

Advertise 10BASE-T.

Definition at line 107 of file mii.h.

◆ MII_ADVERTISE_100

#define MII_ADVERTISE_100 (BIT7 | BIT8)

Advertise 100BASE-T.

Definition at line 106 of file mii.h.

◆ MII_ADVERTISE_100_F

#define MII_ADVERTISE_100_F BIT8

Advertise 100BASE-T, full duplex.

Definition at line 102 of file mii.h.

◆ MII_ADVERTISE_100_H

#define MII_ADVERTISE_100_H BIT7

Advertise 100BASE-T, half duplex.

Definition at line 103 of file mii.h.

◆ MII_ADVERTISE_10_F

#define MII_ADVERTISE_10_F BIT6

Advertise 10BASE-T, full duplex.

Definition at line 104 of file mii.h.

◆ MII_ADVERTISE_10_H

#define MII_ADVERTISE_10_H BIT5

Advertise 10BASE-T, half duplex.

Definition at line 105 of file mii.h.

◆ MII_BMCR

#define MII_BMCR (0x00U)

Basic mode control register.

Definition at line 46 of file mii.h.

◆ MII_BMCR_AN_ENABLE

#define MII_BMCR_AN_ENABLE BIT12

Set to enable auto-negotiation.

Definition at line 63 of file mii.h.

◆ MII_BMCR_AN_RESTART

#define MII_BMCR_AN_RESTART BIT9

Set to restart auto-negotiation.

Definition at line 67 of file mii.h.

◆ MII_BMCR_COLL_TEST

#define MII_BMCR_COLL_TEST BIT7

Set to enable collision signal test.

Definition at line 70 of file mii.h.

◆ MII_BMCR_FULL_DPLX

#define MII_BMCR_FULL_DPLX BIT8

Set for full duplex.

Definition at line 68 of file mii.h.

◆ MII_BMCR_HALF_DPLX

#define MII_BMCR_HALF_DPLX (0)

Set for half duplex.

Definition at line 69 of file mii.h.

◆ MII_BMCR_ISOLATE

#define MII_BMCR_ISOLATE BIT10

Set to electrically isolate PHY from MII (PHY becomes inoperational)

Definition at line 65 of file mii.h.

◆ MII_BMCR_LOOP

#define MII_BMCR_LOOP BIT14

Set to enable loopback mode.

Definition at line 62 of file mii.h.

◆ MII_BMCR_POWER_DOWN

#define MII_BMCR_POWER_DOWN BIT11

Set to power down PHY.

Definition at line 64 of file mii.h.

◆ MII_BMCR_RESET

#define MII_BMCR_RESET BIT15

Set to perform PHY reset.

Definition at line 61 of file mii.h.

◆ MII_BMCR_SPEED_10

#define MII_BMCR_SPEED_10 (0)

Set speed to 10 Mbps.

Definition at line 71 of file mii.h.

◆ MII_BMCR_SPEED_100

#define MII_BMCR_SPEED_100 BIT13

Set speed to 100 Mbps.

Definition at line 72 of file mii.h.

◆ MII_BMCR_SPEED_1000

#define MII_BMCR_SPEED_1000 BIT6

Set speed to 1 Gbps.

Definition at line 73 of file mii.h.

◆ MII_BMSR

#define MII_BMSR (0x01U)

Basic mode status register.

Definition at line 47 of file mii.h.

◆ MII_BMSR_100_T2_F

#define MII_BMSR_100_T2_F BIT10

PHY supports 100BASE-T2, full duplex.

Definition at line 85 of file mii.h.

◆ MII_BMSR_100_T2_H

#define MII_BMSR_100_T2_H BIT9

PHY supports 100BASE-T2, half duplex.

Definition at line 86 of file mii.h.

◆ MII_BMSR_100_T4

#define MII_BMSR_100_T4 BIT15

PHY supports 100BASE-T4 (half-duplex)

Definition at line 80 of file mii.h.

◆ MII_BMSR_100_TX_F

#define MII_BMSR_100_TX_F BIT14

PHY supports 100BASE-TX, full duplex.

Definition at line 81 of file mii.h.

◆ MII_BMSR_100_TX_H

#define MII_BMSR_100_TX_H BIT13

PHY supports 100BASE-TX, half duplex.

Definition at line 82 of file mii.h.

◆ MII_BMSR_10_F

#define MII_BMSR_10_F BIT12

PHY supports 10BASE-T, full duplex.

Definition at line 83 of file mii.h.

◆ MII_BMSR_10_H

#define MII_BMSR_10_H BIT11

PHY supports 10BASE-T, half duplex.

Definition at line 84 of file mii.h.

◆ MII_BMSR_AN_DONE

#define MII_BMSR_AN_DONE BIT5

Set when auto-negotiation is done.

Definition at line 89 of file mii.h.

◆ MII_BMSR_ESTATUS

#define MII_BMSR_ESTATUS BIT8

Set, if MII_ESTATUS is available.

Definition at line 87 of file mii.h.

◆ MII_BMSR_EXTENDED

#define MII_BMSR_EXTENDED BIT0

Extended MII registers available.

Definition at line 95 of file mii.h.

◆ MII_BMSR_FAULT

#define MII_BMSR_FAULT BIT4

Set when remote fault condition is detected.

Definition at line 90 of file mii.h.

◆ MII_BMSR_HAS_AN

#define MII_BMSR_HAS_AN BIT3

Set if PHY can auto-negotiate.

Definition at line 92 of file mii.h.

◆ MII_BMSR_JABBER

#define MII_BMSR_JABBER BIT1

Set when jabber condition detected.

Definition at line 94 of file mii.h.

◆ MII_BMSR_LINK

#define MII_BMSR_LINK BIT2

Set if link is up.

Definition at line 93 of file mii.h.

◆ MII_ESTATUS

#define MII_ESTATUS (0x0fU)

Extended Status Register.

Definition at line 53 of file mii.h.

◆ MII_EXPANSION

#define MII_EXPANSION (0x06U)

Auto-Negotiation Expansion.

Definition at line 52 of file mii.h.

◆ MII_IRQ

#define MII_IRQ (0x1bU)

Interrupt Control/Status.

Definition at line 54 of file mii.h.

◆ MII_IRQ_EN_JABBER

#define MII_IRQ_EN_JABBER BIT15

Enable Jabber occurred IRQ.

Definition at line 148 of file mii.h.

◆ MII_IRQ_EN_LINK_DOWN

#define MII_IRQ_EN_LINK_DOWN BIT10

Enable Link-down occurred IRQ.

Definition at line 143 of file mii.h.

◆ MII_IRQ_EN_LINK_UP

#define MII_IRQ_EN_LINK_UP BIT8

Enable Link-up occurred IRQ.

Definition at line 141 of file mii.h.

◆ MII_IRQ_EN_LPA_ACK

#define MII_IRQ_EN_LPA_ACK BIT11

Enable Link partner acknowledge occurred IRQ.

Definition at line 144 of file mii.h.

◆ MII_IRQ_EN_PAGE_RX

#define MII_IRQ_EN_PAGE_RX BIT13

Enable Page receive occurred IRQ.

Definition at line 146 of file mii.h.

◆ MII_IRQ_EN_PD_FAULT

#define MII_IRQ_EN_PD_FAULT BIT12

Enable Parallel detect fault occurred IRQ.

Definition at line 145 of file mii.h.

◆ MII_IRQ_EN_RMT_FAULT

#define MII_IRQ_EN_RMT_FAULT BIT9

Enable Remote fault occurred IRQ.

Definition at line 142 of file mii.h.

◆ MII_IRQ_EN_RX_ERROR

#define MII_IRQ_EN_RX_ERROR BIT14

Enable Receive error occurred IRQ.

Definition at line 147 of file mii.h.

◆ MII_IRQ_JABBER

#define MII_IRQ_JABBER BIT7

Jabber occurred.

Definition at line 140 of file mii.h.

◆ MII_IRQ_LINK_DOWN

#define MII_IRQ_LINK_DOWN BIT2

Link-down occurred.

Definition at line 135 of file mii.h.

◆ MII_IRQ_LINK_UP

#define MII_IRQ_LINK_UP BIT0

Link-up occurred.

Definition at line 133 of file mii.h.

◆ MII_IRQ_LPA_ACK

#define MII_IRQ_LPA_ACK BIT3

Link partner acknowledge occurred.

Definition at line 136 of file mii.h.

◆ MII_IRQ_PAGE_RX

#define MII_IRQ_PAGE_RX BIT5

Page receive occurred.

Definition at line 138 of file mii.h.

◆ MII_IRQ_PD_FAULT

#define MII_IRQ_PD_FAULT BIT4

Parallel detect fault occurred.

Definition at line 137 of file mii.h.

◆ MII_IRQ_RMT_FAULT

#define MII_IRQ_RMT_FAULT BIT1

Remote fault occurred.

Definition at line 134 of file mii.h.

◆ MII_IRQ_RX_ERROR

#define MII_IRQ_RX_ERROR BIT6

Receive error occurred.

Definition at line 139 of file mii.h.

◆ MII_LPA

#define MII_LPA (0x05U)

Link Parter Abilities.

Definition at line 51 of file mii.h.

◆ MII_LPA_10

#define MII_LPA_10 (BIT5 | BIT6)

Partner can 10BASE-T.

Definition at line 119 of file mii.h.

◆ MII_LPA_100

#define MII_LPA_100 (BIT7 | BIT8)

Partner can 100BASE-T.

Definition at line 118 of file mii.h.

◆ MII_LPA_100_F

#define MII_LPA_100_F BIT8

Partner can 100BASE-T, full duplex.

Definition at line 114 of file mii.h.

◆ MII_LPA_100_H

#define MII_LPA_100_H BIT7

Partner can 100BASE-T, half duplex.

Definition at line 115 of file mii.h.

◆ MII_LPA_10_F

#define MII_LPA_10_F BIT6

Partner can 10BASE-T, full duplex.

Definition at line 116 of file mii.h.

◆ MII_LPA_10_H

#define MII_LPA_10_H BIT5

Partner can 10BASE-T, half duplex.

Definition at line 117 of file mii.h.

◆ MII_LPA_HAS_AN

#define MII_LPA_HAS_AN BIT0

Partner can auto-negotiate.

Definition at line 126 of file mii.h.

◆ MII_PHYID1

#define MII_PHYID1 (0x02U)

PHY Identifier 1.

Definition at line 48 of file mii.h.

◆ MII_PHYID2

#define MII_PHYID2 (0x03U)

PHY Identifier 2.

Definition at line 49 of file mii.h.

Function Documentation

◆ mii_can_100_mbps_full_dp()

static bool mii_can_100_mbps_full_dp ( uint16_t bmsr )

inlinestatic

Check if an Ethernet PHY supports 100 Mbps at full duplex.

Parameters

[in] bmsr Value of the MII basic mode status register

Return values

true	PHY supports 100 Mbps at full duplex
false	PHY does not support 100 Mbps at full duplex

Definition at line 159 of file mii.h.

◆ mii_can_100_mbps_half_dp()

static bool mii_can_100_mbps_half_dp ( uint16_t bmsr )

inlinestatic

Check if an Ethernet PHY supports 100 Mbps at half duplex.

Parameters

[in] bmsr Value of the MII basic mode status register

Return values

true	PHY supports 100 Mbps at half duplex
false	PHY does not support 100 Mbps at half duplex

Definition at line 172 of file mii.h.

◆ mii_can_10_mbps_full_dp()

static bool mii_can_10_mbps_full_dp ( uint16_t bmsr )

inlinestatic

Check if an Ethernet PHY supports 10 Mbps at full duplex.

Parameters

[in] bmsr Value of the MII basic mode status register

Return values

true	PHY supports 10 Mbps at full duplex
false	PHY does not support 10 Mbps at full duplex

Definition at line 185 of file mii.h.

◆ mii_can_10_mbps_half_dp()

static bool mii_can_10_mbps_half_dp ( uint16_t bmsr )

inlinestatic

Check if an Ethernet PHY supports 10 Mbps at half duplex.

Parameters

[in] bmsr Value of the MII basic mode status register

Return values

true	PHY supports 10 Mbps at half duplex
false	PHY does not support 10 Mbps at half duplex

Definition at line 198 of file mii.h.

Detailed Description

Files

Functions

Common MII Management Register Set

Bits in the MII Basic Mode Control Register

Bits in the MII Basic Mode Status Register

Bits in the MII Extended Mode Advertisement Register

Bits in the MII Auto-Negotiation Expansion Register

Bits in the MII Interrupt Control/Status Register

Macro Definition Documentation

◆ MII_ADVERTISE

◆ MII_ADVERTISE_10

◆ MII_ADVERTISE_100

◆ MII_ADVERTISE_100_F

◆ MII_ADVERTISE_100_H

◆ MII_ADVERTISE_10_F

◆ MII_ADVERTISE_10_H

◆ MII_BMCR

◆ MII_BMCR_AN_ENABLE

◆ MII_BMCR_AN_RESTART

◆ MII_BMCR_COLL_TEST

◆ MII_BMCR_FULL_DPLX

◆ MII_BMCR_HALF_DPLX

◆ MII_BMCR_ISOLATE

◆ MII_BMCR_LOOP

◆ MII_BMCR_POWER_DOWN

◆ MII_BMCR_RESET

◆ MII_BMCR_SPEED_10

◆ MII_BMCR_SPEED_100

◆ MII_BMCR_SPEED_1000

◆ MII_BMSR

◆ MII_BMSR_100_T2_F

◆ MII_BMSR_100_T2_H

◆ MII_BMSR_100_T4

◆ MII_BMSR_100_TX_F

◆ MII_BMSR_100_TX_H

◆ MII_BMSR_10_F

◆ MII_BMSR_10_H

◆ MII_BMSR_AN_DONE

◆ MII_BMSR_ESTATUS

◆ MII_BMSR_EXTENDED

◆ MII_BMSR_FAULT

◆ MII_BMSR_HAS_AN

◆ MII_BMSR_JABBER

◆ MII_BMSR_LINK

◆ MII_ESTATUS

◆ MII_EXPANSION

◆ MII_IRQ

◆ MII_IRQ_EN_JABBER

◆ MII_IRQ_EN_LINK_DOWN

◆ MII_IRQ_EN_LINK_UP

◆ MII_IRQ_EN_LPA_ACK

◆ MII_IRQ_EN_PAGE_RX

◆ MII_IRQ_EN_PD_FAULT

◆ MII_IRQ_EN_RMT_FAULT

◆ MII_IRQ_EN_RX_ERROR

◆ MII_IRQ_JABBER

◆ MII_IRQ_LINK_DOWN

◆ MII_IRQ_LINK_UP

◆ MII_IRQ_LPA_ACK

◆ MII_IRQ_PAGE_RX

◆ MII_IRQ_PD_FAULT

◆ MII_IRQ_RMT_FAULT

◆ MII_IRQ_RX_ERROR

◆ MII_LPA

◆ MII_LPA_10

◆ MII_LPA_100

◆ MII_LPA_100_F

◆ MII_LPA_100_H

◆ MII_LPA_10_F

◆ MII_LPA_10_H

◆ MII_LPA_HAS_AN

◆ MII_PHYID1

◆ MII_PHYID2

Function Documentation

◆ mii_can_100_mbps_full_dp()

◆ mii_can_100_mbps_half_dp()

◆ mii_can_10_mbps_full_dp()

◆ mii_can_10_mbps_half_dp()