periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-l4r5zi board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-l4r5zi board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

Timer configuration

#define TIMER_0_ISR   isr_tim5
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_lpuart1)
 
#define UART_1_ISR   (isr_usart3)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

Variable Documentation

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
}
Advanced Peripheral Bus 2.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
use alternate function 5
port A
Definition: periph_cpu.h:36
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 100 of file periph_conf.h.

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR1_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
}
Advanced Peripheral Bus 1.
Definition: periph_cpu.h:44

Definition at line 40 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR2_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_G, 8),
.tx_pin = GPIO_PIN(PORT_G, 7),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB12,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR1_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
.type = STM32_USART,
.clk_src = 0,
}
}
use alternate function 8
Advanced Peripheral Bus 1.
Definition: periph_cpu.h:44
STM32 USART module type.
Definition: periph_cpu.h:585
port D
Definition: periph_cpu.h:39
STM32 Low-power UART (LPUART) module type.
Definition: periph_cpu.h:586
port G
Definition: periph_cpu.h:42
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
use alternate function 7

Definition at line 59 of file periph_conf.h.