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periph_conf.h
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1/*
2 * Copyright (C) 2021 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23/* Add specific clock configuration (HSE, LSE) for this board here */
24#ifndef CONFIG_BOARD_HAS_LSE
25#define CONFIG_BOARD_HAS_LSE 1
26#endif
27
28/* This board provides a 32MHz HSE oscillator */
29#ifndef CONFIG_BOARD_HAS_HSE
30#define CONFIG_BOARD_HAS_HSE 1
31#endif
32
33#ifndef CONFIG_CLOCK_HSE
34#define CONFIG_CLOCK_HSE MHZ(32)
35#endif
36
37#include "periph_cpu.h"
38#include "clk_conf.h"
39#include "cfg_rtt_default.h"
40#include "cfg_timer_tim2.h"
41
42#ifdef __cplusplus
43extern "C" {
44#endif
45
50static const uart_conf_t uart_config[] = {
51 {
52 .dev = USART1,
53 .rcc_mask = RCC_APB2ENR_USART1EN,
54 .rx_pin = GPIO_PIN(PORT_B, 7),
55 .tx_pin = GPIO_PIN(PORT_B, 6),
56 .rx_af = GPIO_AF7,
57 .tx_af = GPIO_AF7,
58 .bus = APB2,
59 .irqn = USART1_IRQn,
60 .type = STM32_USART,
61 .clk_src = 0, /* Use APB clock */
62 },
63 {
64 .dev = USART2,
65 .rcc_mask = RCC_APB1ENR1_USART2EN,
66 .rx_pin = GPIO_PIN(PORT_A, 3),
67 .tx_pin = GPIO_PIN(PORT_A, 2),
68 .rx_af = GPIO_AF7,
69 .tx_af = GPIO_AF7,
70 .bus = APB1,
71 .irqn = USART2_IRQn,
72 .type = STM32_USART,
73 .clk_src = 0, /* Use APB clock */
74 },
75 {
76 .dev = LPUART1,
77 .rcc_mask = RCC_APB1ENR2_LPUART1EN,
78 .rx_pin = GPIO_PIN(PORT_C, 1),
79 .tx_pin = GPIO_PIN(PORT_C, 0),
80 .rx_af = GPIO_AF8,
81 .tx_af = GPIO_AF8,
82 .bus = APB12,
83 .irqn = LPUART1_IRQn,
84 .type = STM32_LPUART,
85 .clk_src = 0, /* Use APB clock */
86 },
87};
88
89#define UART_0_ISR isr_usart1
90#define UART_1_ISR isr_usart2
91#define UART_2_ISR isr_lpuart1
92
93#define UART_NUMOF ARRAY_SIZE(uart_config)
99static const spi_conf_t spi_config[] = {
100 {
101 .dev = SUBGHZSPI, /* Internally connected to Sub-GHz radio Modem */
102 .mosi_pin = GPIO_UNDEF,
103 .miso_pin = GPIO_UNDEF,
104 .sclk_pin = GPIO_UNDEF,
105 .cs_pin = SPI_CS_UNDEF,
106 .mosi_af = GPIO_AF_UNDEF,
107 .miso_af = GPIO_AF_UNDEF,
108 .sclk_af = GPIO_AF_UNDEF,
109 .cs_af = GPIO_AF_UNDEF,
110 .rccmask = RCC_APB3ENR_SUBGHZSPIEN,
111 .apbbus = APB3,
112 },
113/* SUBGHZ DEBUG PINS use the SPI1 pins */
114#if !IS_ACTIVE(CONFIG_STM32_WLX5XX)
115 {
116 .dev = SPI2,
117 .mosi_pin = GPIO_PIN(PORT_A, 10),
118 .miso_pin = GPIO_PIN(PORT_B, 14),
119 .sclk_pin = GPIO_PIN(PORT_B, 13),
120 .cs_pin = SPI_CS_UNDEF,
121 .mosi_af = GPIO_AF5,
122 .miso_af = GPIO_AF5,
123 .sclk_af = GPIO_AF5,
124 .cs_af = GPIO_AF5,
125 .rccmask = RCC_APB1ENR1_SPI2EN,
126 .apbbus = APB1,
127 }
128#endif
129};
130
131#define SPI_NUMOF ARRAY_SIZE(spi_config)
138static const i2c_conf_t i2c_config[] = {
139 {
140 .dev = I2C2,
141 .speed = I2C_SPEED_NORMAL,
142 .scl_pin = GPIO_PIN(PORT_B, 15),
143 .sda_pin = GPIO_PIN(PORT_A, 15),
144 .scl_af = GPIO_AF4,
145 .sda_af = GPIO_AF4,
146 .bus = APB1,
147 .rcc_mask = RCC_APB1ENR1_I2C2EN,
148 .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
149 .irqn = I2C2_ER_IRQn,
150 }
151};
152
153#define I2C_1_ISR isr_i2c2_er
154
155#define I2C_NUMOF ARRAY_SIZE(i2c_config)
163static const adc_conf_t adc_config[] = {
164 { GPIO_PIN(PORT_B, 3), 2 },
165 { GPIO_PIN(PORT_B, 4), 3 },
166 { GPIO_UNDEF, 14 }, /* VBAT */
167};
168
169#define VBAT_ADC ADC_LINE(2)
170#define ADC_NUMOF ARRAY_SIZE(adc_config)
174#ifdef __cplusplus
175}
176#endif
177
178#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF_UNDEF
an UNDEF value definition, e.g.
Definition cpu_gpio.h:121
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219