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periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-l552ze-q board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-l552ze-q board.

Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim5.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.


UART configuration

#define UART_0_ISR   (isr_lpuart1)
#define UART_1_ISR   (isr_usart3)
#define UART_NUMOF   ARRAY_SIZE(uart_config)
static const uart_conf_t uart_config []

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
static const spi_conf_t spi_config []

PWM configuration

To find appriopate device and channel find in the MCU datasheet table concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y], where: TIM[X] - is device, [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is channel 0 in configuration structure (cc_chan - field), Port column in the table describes connected port.

For Nucleo-L552ZE-Q this information is in the datasheet, Table 22, page 122.

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
static const pwm_conf_t pwm_config []

Macro Definition Documentation



Definition at line 24 of file periph_conf.h.


#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 146 of file periph_conf.h.


#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 94 of file periph_conf.h.


#define UART_0_ISR   (isr_lpuart1)

Definition at line 68 of file periph_conf.h.


#define UART_1_ISR   (isr_usart3)

Definition at line 69 of file periph_conf.h.


#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 71 of file periph_conf.h.

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]

Definition at line 113 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
Initial value:
= {
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
use alternate function 5
Definition cpu_gpio.h:107
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 78 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
Initial value:
= {
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR2_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_G, 8),
.tx_pin = GPIO_PIN(PORT_G, 7),
.rx_af = GPIO_AF8,
.tx_af = GPIO_AF8,
.bus = APB12,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
.dev = USART3,
.rcc_mask = RCC_APB1ENR1_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
.type = STM32_USART,
.clk_src = 0,
port G
Definition periph_cpu.h:53
port D
Definition periph_cpu.h:50
use alternate function 8
Definition cpu_gpio.h:111
use alternate function 7
Definition cpu_gpio.h:109
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
STM32 USART module type.
Definition cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

Definition at line 41 of file periph_conf.h.