Peripheral MCU configuration for the nucleo-l432kc board.
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#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb6_pb7.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2_tim15_tim16.h"
Go to the source code of this file.
◆ CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE 1 |
◆ PWM_NUMOF
◆ SPI_NUMOF
◆ UART_0_ISR
#define UART_0_ISR (isr_usart2) |
◆ UART_1_ISR
#define UART_1_ISR (isr_usart1) |
◆ UART_NUMOF
◆ pwm_config
Initial value:= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF1
use alternate function 1
@ APB2
Advanced Peripheral Bus 2
Definition at line 80 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = SPI1,
.rccmask = RCC_APB2ENR_SPI1EN,
}
}
@ GPIO_AF5
use alternate function 5
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition at line 100 of file periph_conf.h.
◆ uart_config
Initial value:= {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR1_USART2EN,
.irqn = USART2_IRQn,
.clk_src = 0,
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.irqn = USART1_IRQn,
.clk_src = 0,
},
}
@ GPIO_AF3
use alternate function 3
@ GPIO_AF7
use alternate function 7
@ STM32_USART
STM32 USART module type.
@ APB1
Advanced Peripheral Bus 1
Definition at line 43 of file periph_conf.h.