#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_timer_tim5.h"
#include "cfg_usb_otg_fs.h"
#include "mii.h"
Go to the source code of this file.
Peripheral MCU configuration for the nucleo-f439zi board | |
#define | CONFIG_BOARD_HAS_LSE 1 |
#define | CONFIG_BOARD_HAS_HSE 1 |
DMA streams configuration | |
#define | DMA_0_ISR isr_dma2_stream3 |
#define | DMA_1_ISR isr_dma2_stream2 |
#define | DMA_2_ISR isr_dma2_stream0 |
#define | DMA_NUMOF ARRAY_SIZE(dma_config) |
static const dma_conf_t | dma_config [] |
UART configuration | |
#define | UART_0_ISR (isr_usart3) |
#define | UART_1_ISR (isr_usart6) |
#define | UART_2_ISR (isr_usart2) |
#define | UART_NUMOF ARRAY_SIZE(uart_config) |
static const uart_conf_t | uart_config [] |
PWM configuration | |
#define | PWM_NUMOF ARRAY_SIZE(pwm_config) |
static const pwm_conf_t | pwm_config [] |
SPI configuration | |
#define | SPI_NUMOF ARRAY_SIZE(spi_config) |
static const spi_conf_t | spi_config [] |
ETH configuration | |
#define | ETH_DMA_ISR isr_dma2_stream0 |
static const eth_conf_t | eth_config |
ADC configuration | |
Note that we do not configure all ADC channels, and not in the STM32F439ZI order. Instead, we just define 6 ADC channels, for the Nucleo Arduino header pins A0-A5 and the internal VBAT channel. To find appropriate device and channel find in the board manual, table showing pin assignments and information about ADC - a text similar to ADC[X]_IN[Y], where: [X] - describes used device - indexed from 0, for example ADC12_IN10 is device 0 or device 1, [Y] - describes used channel - indexed from 1, for example ADC12_IN10 is channel 10 For STM32F439ZI this information is in MCU datasheet, Table 10, page 53 or in Nucleo-f439ZI board manual, Table 17, page 52. | |
#define | VBAT_ADC ADC_LINE(6) |
VBAT ADC line. | |
#define | ADC_NUMOF ARRAY_SIZE(adc_config) |
static const adc_conf_t | adc_config [] |
#define ADC_NUMOF ARRAY_SIZE(adc_config) |
Definition at line 236 of file periph_conf.h.
#define CONFIG_BOARD_HAS_HSE 1 |
Definition at line 29 of file periph_conf.h.
#define CONFIG_BOARD_HAS_LSE 1 |
Definition at line 24 of file periph_conf.h.
#define DMA_0_ISR isr_dma2_stream3 |
Definition at line 53 of file periph_conf.h.
#define DMA_1_ISR isr_dma2_stream2 |
Definition at line 54 of file periph_conf.h.
#define DMA_2_ISR isr_dma2_stream0 |
Definition at line 55 of file periph_conf.h.
#define DMA_NUMOF ARRAY_SIZE(dma_config) |
Definition at line 57 of file periph_conf.h.
#define ETH_DMA_ISR isr_dma2_stream0 |
Definition at line 198 of file periph_conf.h.
#define PWM_NUMOF ARRAY_SIZE(pwm_config) |
Definition at line 143 of file periph_conf.h.
#define SPI_NUMOF ARRAY_SIZE(spi_config) |
Definition at line 172 of file periph_conf.h.
#define UART_0_ISR (isr_usart3) |
Definition at line 109 of file periph_conf.h.
#define UART_1_ISR (isr_usart6) |
Definition at line 110 of file periph_conf.h.
#define UART_2_ISR (isr_usart2) |
Definition at line 111 of file periph_conf.h.
#define UART_NUMOF ARRAY_SIZE(uart_config) |
Definition at line 113 of file periph_conf.h.
#define VBAT_ADC ADC_LINE(6) |
VBAT ADC line.
Definition at line 234 of file periph_conf.h.
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Definition at line 224 of file periph_conf.h.
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Definition at line 47 of file periph_conf.h.
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Definition at line 179 of file periph_conf.h.
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Definition at line 120 of file periph_conf.h.
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Definition at line 150 of file periph_conf.h.
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Definition at line 64 of file periph_conf.h.