23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
27#include "periph_cpu.h"
29#include "cfg_rtt_default.h"
49#define DMA_SHARED_ISR_0 isr_dma1_channel2_3
50#define DMA_SHARED_ISR_0_STREAMS { 0, 1 }
51#define DMA_SHARED_ISR_1 isr_dma1_channel4_5_6_7
52#define DMA_SHARED_ISR_1_STREAMS { 2, 3, 4 }
54#define DMA_NUMOF ARRAY_SIZE(dma_config)
64 .rcc_mask = RCC_APB1ENR_USART2EN,
73#ifdef MODULE_PERIPH_DMA
80 .rcc_mask = RCC_APB2ENR_USART1EN,
89#ifdef MODULE_PERIPH_DMA
96#define UART_0_ISR (isr_usart2)
97#define UART_1_ISR (isr_usart1)
99#define UART_NUMOF ARRAY_SIZE(uart_config)
117 .rccmask = RCC_APB1ENR_SPI2EN,
119#ifdef MODULE_PERIPH_DMA
136 .rccmask = RCC_APB2ENR_SPI1EN,
138#ifdef MODULE_PERIPH_DMA
147#define SPI_NUMOF ARRAY_SIZE(spi_config)
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF4
use alternate function 4
@ GPIO_AF0
use alternate function 0
@ STM32_USART
STM32 USART module type.
#define SPI_CS_UNDEF
Define value for unused CS line.
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
SPI device configuration.
SPI_t * dev
pointer to the used SPI device
UART device configuration.
USART_t * dev
pointer to the used UART device