periph_conf.h
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1 /*
2  * Copyright (C) 2017 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
62 #define CLOCK_USE_PLL (1)
63 
64 #if CLOCK_USE_PLL
65 /* edit these values to adjust the PLL output frequency */
66 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
67 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
68 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
69 #else
70 /* edit this value to your needs */
71 #define CLOCK_DIV (1U)
72 /* generate the actual core clock frequency */
73 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
74 #endif
75 
81 static const tc32_conf_t timer_config[] = {
82  { /* Timer 0 - System Clock */
83  .dev = TC3,
84  .irq = TC3_IRQn,
85  .pm_mask = PM_APBCMASK_TC3,
86  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
87 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
88  .gclk_src = GCLK_CLKCTRL_GEN(1),
89  .prescaler = TC_CTRLA_PRESCALER_DIV1,
90 #else
91  .gclk_src = GCLK_CLKCTRL_GEN(0),
92  .prescaler = TC_CTRLA_PRESCALER_DIV8,
93 #endif
94  .flags = TC_CTRLA_MODE_COUNT16,
95  },
96  { /* Timer 1 */
97  .dev = TC4,
98  .irq = TC4_IRQn,
99  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
100  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
101 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
102  .gclk_src = GCLK_CLKCTRL_GEN(1),
103  .prescaler = TC_CTRLA_PRESCALER_DIV1,
104 #else
105  .gclk_src = GCLK_CLKCTRL_GEN(0),
106  .prescaler = TC_CTRLA_PRESCALER_DIV8,
107 #endif
108  .flags = TC_CTRLA_MODE_COUNT32,
109  }
110 };
111 
112 #define TIMER_0_MAX_VALUE 0xffff
113 
114 /* interrupt function name mapping */
115 #define TIMER_0_ISR isr_tc3
116 #define TIMER_1_ISR isr_tc4
117 
118 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
119 
125 static const uart_conf_t uart_config[] = {
126  {
127  .dev = &SERCOM0->USART,
128  .rx_pin = GPIO_PIN(PA, 11), /* RX pin */
129  .tx_pin = GPIO_PIN(PA, 10), /* TX pin */
130  .mux = GPIO_MUX_C,
131  .rx_pad = UART_PAD_RX_3,
132  .tx_pad = UART_PAD_TX_2,
133  .flags = UART_FLAG_NONE,
134  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
135  }
136 };
137 
138 /* interrupt function name mapping */
139 #define UART_0_ISR isr_sercom0
140 
141 #define UART_NUMOF ARRAY_SIZE(uart_config)
142 
148 #define PWM_0_EN 1
149 #define PWM_1_EN 1
150 #define PWM_MAX_CHANNELS 2
151 /* for compatibility with test application */
152 #define PWM_0_CHANNELS PWM_MAX_CHANNELS
153 #define PWM_1_CHANNELS PWM_MAX_CHANNELS
154 
155 /* PWM device configuration */
156 static const pwm_conf_t pwm_config[] = {
157 #if PWM_0_EN
158  {TCC0, {
159  /* GPIO pin, MUX value, TCC channel */
160  { GPIO_UNDEF, (gpio_mux_t)0, 0 },
161  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 }, /* ~9 */
162  }},
163 #endif
164 #if PWM_1_EN
165  {TCC2, {
166  /* GPIO pin, MUX value, TCC channel */
167  { GPIO_PIN(PA, 16), GPIO_MUX_E, 0 }, /* ~11 */
168  { GPIO_UNDEF, (gpio_mux_t)0, 1 },
169  }},
170 #endif
171 };
172 
173 /* number of devices that are actually defined */
174 #define PWM_NUMOF (2U)
175 
182 /* ADC Default values */
183 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
184 
185 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
186 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
187 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
188 
189 static const adc_conf_chan_t adc_channels[] = {
190  /* port, pin, muxpos */
191  { GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0 }, /* A0 */
192  { GPIO_PIN(PB, 8), ADC_INPUTCTRL_MUXPOS_PIN2 }, /* A1 */
193  { GPIO_PIN(PB, 9), ADC_INPUTCTRL_MUXPOS_PIN3 }, /* A2 */
194  { GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4 }, /* A3 */
195  { GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5 }, /* A4 */
196  { GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10 }, /* A5 */
197  { GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7 }, /* A7 */
198 };
199 
200 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
201 
207 static const spi_conf_t spi_config[] = {
208  {
209  .dev = &SERCOM4->SPI,
210  .miso_pin = GPIO_PIN(PA, 12),
211  .mosi_pin = GPIO_PIN(PB, 10),
212  .clk_pin = GPIO_PIN(PB, 11),
213  .miso_mux = GPIO_MUX_D,
214  .mosi_mux = GPIO_MUX_D,
215  .clk_mux = GPIO_MUX_D,
216  .miso_pad = SPI_PAD_MISO_0,
217  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
218  }
219 };
220 
221 #define SPI_NUMOF ARRAY_SIZE(spi_config)
222 
228 static const i2c_conf_t i2c_config[] = {
229  {
230  .dev = &(SERCOM3->I2CM),
231  .speed = I2C_SPEED_NORMAL,
232  .scl_pin = GPIO_PIN(PA, 23),
233  .sda_pin = GPIO_PIN(PA, 22),
234  .mux = GPIO_MUX_C,
235  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
236  .flags = I2C_FLAG_NONE
237  }
238 };
239 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
240 
246 #define RTC_DEV RTC->MODE2
247 
253 #define RTT_DEV RTC->MODE0
254 #define RTT_IRQ RTC_IRQn
255 #define RTT_IRQ_PRIO 10
256 #define RTT_ISR isr_rtc
257 #define RTT_MAX_VALUE (0xffffffff)
258 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
259 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
260 
266 static const sam0_common_usb_config_t sam_usbdev_config[] = {
267  {
268  .dm = GPIO_PIN(PA, 24),
269  .dp = GPIO_PIN(PA, 25),
270  .d_mux = GPIO_MUX_G,
271  .device = &USB->DEVICE,
272  }
273 };
276 #ifdef __cplusplus
277 }
278 #endif
279 
280 #endif /* PERIPH_CONF_H */
281 
select peripheral function D
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
I2C configuration options.
Definition: periph_cpu.h:128
Tc * dev
pointer to the used Timer device
use pad 0 for MISO line
select peripheral function E
No flags set.
select pad 3
static const gpio_t adc_channels[]
Static array with declared ADC channels.
port A
Definition: periph_cpu.h:87
port B
Definition: periph_cpu.h:88
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:435
gpio_t dm
D- line gpio.
No flags set.
ADC Channel Configuration.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
PWM configuration.
select peripheral function C
select pad 2
select peripheral function G
USB peripheral parameters.
gpio_mux_t
Available MUX values for configuring a pin&#39;s alternate function.
UART device configuration.
Definition: periph_cpu.h:166
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:240
use pad 2 for MOSI, pad 3 for SCK
SPI configuration structure type.
Definition: periph_cpu.h:271
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100 kbit/s
Definition: i2c.h:183
Timer device configuration.