sam0_common/include/periph_cpu_common.h File Reference

Common CPU specific definitions for all SAMx21 based CPUs. More...

Detailed Description

Common CPU specific definitions for all SAMx21 based CPUs.

Common CPU specific definitions for all SAMx21 based CPUs

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file sam0_common/include/periph_cpu_common.h.

#include "cpu.h"
+ Include dependency graph for sam0_common/include/periph_cpu_common.h:

Go to the source code of this file.

Data Structures

struct  uart_conf_t
 UART device configuration. More...
 
struct  spi_conf_t
 SPI module configuration options. More...
 
struct  adc_conf_chan_t
 ADC Channel Configuration. More...
 

Macros

#define GPIO_UNDEF   (0xffffffff)
 Definition of a fitting UNDEF value.
 
#define CPUID_LEN   (16U)
 Length of the CPU_ID in octets.
 
#define PERIPH_SPI_NEEDS_INIT_CS
 Use shared SPI functions.
 
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
 
#define PERIPH_SPI_NEEDS_TRANSFER_REG
 
#define PERIPH_SPI_NEEDS_TRANSFER_REGS
 
Power mode configuration
#define PM_NUM_MODES   (3)
 

Enumerations

enum  gpio_mux_t {
  GPIO_MUX_A = 0x0, GPIO_MUX_B = 0x1, GPIO_MUX_C = 0x2, GPIO_MUX_D = 0x3,
  GPIO_MUX_E = 0x4, GPIO_MUX_F = 0x5, GPIO_MUX_G = 0x6, GPIO_MUX_H = 0x7,
  GPIO_MUX_A = 0, GPIO_MUX_B = 1
}
 Available MUX values for configuring a pin's alternate function. More...
 
enum  uart_rxpad_t { UART_PAD_RX_0 = 0x0, UART_PAD_RX_1 = 0x1, UART_PAD_RX_2 = 0x2, UART_PAD_RX_3 = 0x3 }
 Available values for SERCOM UART RX pad selection. More...
 
enum  uart_txpad_t { UART_PAD_TX_0 = 0x0, UART_PAD_TX_2 = 0x1, UART_PAD_TX_0_RTS_2_CTS_3 = 0x2 }
 Available values for SERCOM UART TX pad selection. More...
 
enum  uart_flag_t { UART_FLAG_NONE = 0x0, UART_FLAG_RUN_STANDBY = 0x1, UART_FLAG_WAKEUP = 0x2 }
 Available SERCOM UART flag selections. More...
 
enum  spi_misopad_t { SPI_PAD_MISO_0 = 0x0, SPI_PAD_MISO_1 = 0x1, SPI_PAD_MISO_2 = 0x2, SPI_PAD_MISO_3 = 0x3 }
 Available values for SERCOM SPI MISO pad selection. More...
 
enum  spi_mosipad_t { SPI_PAD_MOSI_0_SCK_1 = 0x0, SPI_PAD_MOSI_2_SCK_3 = 0x1, SPI_PAD_MOSI_3_SCK_1 = 0x2, SPI_PAD_MOSI_0_SCK_3 = 0x3 }
 Available values for SERCOM SPI MOSI and SCK pad selection. More...
 

Functions

void gpio_init_mux (gpio_t pin, gpio_mux_t mux)
 Set up alternate function (PMUX setting) for a PORT pin. More...
 
static int sercom_id (void *sercom)
 Return the numeric id of a SERCOM device derived from its address. More...
 
static void sercom_clk_en (void *sercom)
 Enable peripheral clock for given SERCOM device. More...
 
static void sercom_clk_dis (void *sercom)
 Disable peripheral clock for given SERCOM device. More...
 
static void sercom_set_gen (void *sercom, uint32_t gclk)
 Configure generator clock for given SERCOM device. More...
 
#define HAVE_GPIO_T
 Override GPIO type.
 
typedef uint32_t gpio_t
 
#define GPIO_PIN(x, y)   (((gpio_t)(&PORT->Group[x])) | y)
 Macro for accessing GPIO pins.
 
#define GPIO_MODE(pr, ie, pe)   (pr | (ie << 1) | (pe << 2))
 Generate GPIO mode bitfields. More...
 
enum  { PA = 0, PB = 1, PC = 2 }
 Available ports on the SAMD21 & SAML21. More...
 
#define HAVE_SPI_MODE_T
 Override SPI modes.
 
enum  spi_mode_t {
  SPI_MODE_0 = SPI_MODE_SEL(0, 0), SPI_MODE_1 = SPI_MODE_SEL(0, 1), SPI_MODE_2 = SPI_MODE_SEL(1, 0), SPI_MODE_3 = SPI_MODE_SEL(1, 1),
  SPI_MODE_0 = 0, SPI_MODE_1 = (SSI_CR0_SPH), SPI_MODE_2 = (SSI_CR0_SPO), SPI_MODE_3 = (SSI_CR0_SPO | SSI_CR0_SPH),
  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0, SPI_MODE_1 = SSI_FRF_MOTO_MODE_1, SPI_MODE_2 = SSI_FRF_MOTO_MODE_2, SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
  SPI_MODE_0 = 0, SPI_MODE_1 = SPI_CONFIG_CPHA_Msk, SPI_MODE_2 = SPI_CONFIG_CPOL_Msk, SPI_MODE_3 = (SPI_CONFIG_CPOL_Msk | SPI_CONFIG_CPHA_Msk),
  SPI_MODE_0 = 0x0, SPI_MODE_1 = 0x1, SPI_MODE_2 = 0x2, SPI_MODE_3 = 0x3,
  SPI_MODE_0 = (SPI_CSR_NCPHA), SPI_MODE_1 = (0), SPI_MODE_2 = (SPI_CSR_CPOL | SPI_CSR_NCPHA), SPI_MODE_3 = (SPI_CSR_CPOL),
  SPI_MODE_0 = 0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3
}
 
#define HAVE_SPI_CLK_T
 Override SPI clock speed values.
 
enum  spi_clk_t {
  SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1), SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0), SPI_CLK_1MHZ = SPI_CLK_SEL(0, 0, 1), SPI_CLK_5MHZ = SPI_CLK_SEL(0, 0, 0),
  SPI_CLK_10MHZ = SPI_CLK_SEL(1, 0, 0), SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ = 1, SPI_CLK_1MHZ = 2,
  SPI_CLK_5MHZ = 3, SPI_CLK_10MHZ = 4, SPI_CLK_100KHZ = 100000, SPI_CLK_400KHZ = 400000,
  SPI_CLK_1MHZ = 1000000, SPI_CLK_4MHZ = 4000000, SPI_CLK_5MHZ = 5000000, SPI_CLK_10MHZ = 10000000,
  SPI_CLK_100KHZ = 100, SPI_CLK_400KHZ = 400, SPI_CLK_1MHZ = 1000, SPI_CLK_5MHZ = 5000,
  SPI_CLK_10MHZ = 10000, SPI_CLK_100KHZ = SPI_FREQUENCY_FREQUENCY_K125, SPI_CLK_400KHZ = SPI_FREQUENCY_FREQUENCY_K500, SPI_CLK_1MHZ = SPI_FREQUENCY_FREQUENCY_M1,
  SPI_CLK_5MHZ = SPI_FREQUENCY_FREQUENCY_M4, SPI_CLK_10MHZ = SPI_FREQUENCY_FREQUENCY_M8, SPI_CLK_100KHZ = 100000U, SPI_CLK_400KHZ = 400000U,
  SPI_CLK_1MHZ = 1000000U, SPI_CLK_5MHZ = 5000000U, SPI_CLK_10MHZ = 10000000U, SPI_CLK_100KHZ = (100000),
  SPI_CLK_400KHZ = (400000), SPI_CLK_1MHZ = (1000000), SPI_CLK_5MHZ = (5000000), SPI_CLK_10MHZ = (10000000),
  SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ, SPI_CLK_1MHZ, SPI_CLK_5MHZ,
  SPI_CLK_10MHZ
}
 

Macro Definition Documentation

◆ GPIO_MODE

#define GPIO_MODE (   pr,
  ie,
  pe 
)    (pr | (ie << 1) | (pe << 2))

Generate GPIO mode bitfields.

We use 3 bit to determine the pin functions:

  • bit 0: PD(0) or PU(1)
  • bit 1: input enable
  • bit 2: pull enable

Definition at line 80 of file sam0_common/include/periph_cpu_common.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the SAMD21 & SAML21.

Enumerator
PA 

port A

PB 

port B

PC 

port C

Definition at line 66 of file sam0_common/include/periph_cpu_common.h.

◆ gpio_mux_t

enum gpio_mux_t

Available MUX values for configuring a pin's alternate function.

Enumerator
GPIO_MUX_A 

select peripheral function A

GPIO_MUX_B 

select peripheral function B

GPIO_MUX_C 

select peripheral function C

GPIO_MUX_D 

select peripheral function D

GPIO_MUX_E 

select peripheral function E

GPIO_MUX_F 

select peripheral function F

GPIO_MUX_G 

select peripheral function G

GPIO_MUX_H 

select peripheral function H

GPIO_MUX_A 

alternate function A

GPIO_MUX_B 

alternate function B

Definition at line 119 of file sam0_common/include/periph_cpu_common.h.

◆ spi_clk_t

enum spi_clk_t
Enumerator
SPI_CLK_100KHZ 

16/128 -> 125KHz

SPI_CLK_400KHZ 

16/32 -> 500KHz

SPI_CLK_1MHZ 

16/16 -> 1MHz

SPI_CLK_5MHZ 

16/4 -> 4MHz

SPI_CLK_10MHZ 

16/2 -> 8MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_4MHZ 

drive the SPI bus with 4MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

Definition at line 211 of file sam0_common/include/periph_cpu_common.h.

◆ spi_misopad_t

Available values for SERCOM SPI MISO pad selection.

Enumerator
SPI_PAD_MISO_0 

use pad 0 for MISO line

SPI_PAD_MISO_1 

use pad 0 for MISO line

SPI_PAD_MISO_2 

use pad 0 for MISO line

SPI_PAD_MISO_3 

use pad 0 for MISO line

Definition at line 176 of file sam0_common/include/periph_cpu_common.h.

◆ spi_mode_t

enum spi_mode_t
Enumerator
SPI_MODE_0 

mode 0

SPI_MODE_1 

mode 1

SPI_MODE_2 

mode 2

SPI_MODE_3 

mode 3

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

Definition at line 198 of file sam0_common/include/periph_cpu_common.h.

◆ spi_mosipad_t

Available values for SERCOM SPI MOSI and SCK pad selection.

Enumerator
SPI_PAD_MOSI_0_SCK_1 

use pad 0 for MOSI, pad 1 for SCK

SPI_PAD_MOSI_2_SCK_3 

use pad 2 for MOSI, pad 3 for SCK

SPI_PAD_MOSI_3_SCK_1 

use pad 3 for MOSI, pad 1 for SCK

SPI_PAD_MOSI_0_SCK_3 

use pad 0 for MOSI, pad 3 for SCK

Definition at line 186 of file sam0_common/include/periph_cpu_common.h.

◆ uart_flag_t

Available SERCOM UART flag selections.

Enumerator
UART_FLAG_NONE 

No flags set.

UART_FLAG_RUN_STANDBY 

run SERCOM in standby mode

UART_FLAG_WAKEUP 

wake from sleep on receive

Definition at line 153 of file sam0_common/include/periph_cpu_common.h.

◆ uart_rxpad_t

Available values for SERCOM UART RX pad selection.

Enumerator
UART_PAD_RX_0 

use pad 0 for RX line

UART_PAD_RX_1 

select pad 1

UART_PAD_RX_2 

select pad 2

UART_PAD_RX_3 

select pad 3

Definition at line 133 of file sam0_common/include/periph_cpu_common.h.

◆ uart_txpad_t

Available values for SERCOM UART TX pad selection.

Enumerator
UART_PAD_TX_0 

select pad 0

UART_PAD_TX_2 

select pad 2

UART_PAD_TX_0_RTS_2_CTS_3 

TX is pad 0, on top RTS on pad 2 and CTS on pad 3.

Definition at line 143 of file sam0_common/include/periph_cpu_common.h.

Function Documentation

◆ gpio_init_mux()

void gpio_init_mux ( gpio_t  pin,
gpio_mux_t  mux 
)

Set up alternate function (PMUX setting) for a PORT pin.

Parameters
[in]pinPin to set the multiplexing for
[in]muxMux value

◆ sercom_clk_dis()

static void sercom_clk_dis ( void *  sercom)
inlinestatic

Disable peripheral clock for given SERCOM device.

Parameters
[in]sercomSERCOM device

Definition at line 282 of file sam0_common/include/periph_cpu_common.h.

◆ sercom_clk_en()

static void sercom_clk_en ( void *  sercom)
inlinestatic

Enable peripheral clock for given SERCOM device.

Parameters
[in]sercomSERCOM device

Definition at line 264 of file sam0_common/include/periph_cpu_common.h.

◆ sercom_id()

static int sercom_id ( void *  sercom)
inlinestatic

Return the numeric id of a SERCOM device derived from its address.

Parameters
[in]sercomSERCOM device
Returns
numeric id of the given SERCOM device

Definition at line 250 of file sam0_common/include/periph_cpu_common.h.

◆ sercom_set_gen()

static void sercom_set_gen ( void *  sercom,
uint32_t  gclk 
)
inlinestatic

Configure generator clock for given SERCOM device.

Parameters
[in]sercomSERCOM device
[in]gclkGenerator clock

Definition at line 301 of file sam0_common/include/periph_cpu_common.h.