periph_cpu_common.h

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/*
 * Copyright (C) 2015 HAW Hamburg
 *               2016 Freie Universität Berlin
 *               2016 INRIA
 *
 * This file is subject to the terms and conditions of the GNU Lesser
 * General Public License v2.1. See the file LICENSE in the top level
 * directory for more details.
 */

#ifndef PERIPH_CPU_COMMON_H
#define PERIPH_CPU_COMMON_H

#include "cpu.h"

#ifdef __cplusplus
extern "C" {
#endif

#define CPUID_LEN           (4U)

#ifndef DOXYGEN

#define HAVE_GPIO_T
typedef uint8_t gpio_t;
#endif

#define GPIO_UNDEF          (0xff)

#define GPIO_PIN(x, y)          ((x << 4) | y)

#ifndef DOXYGEN

#define HAVE_GPIO_FLANK_T
typedef enum {
    GPIO_LOW,          
    GPIO_BOTH,         
    GPIO_FALLING,      
    GPIO_RISING,       
} gpio_flank_t;
#endif /* ndef DOXYGEN */

#define PERIPH_SPI_NEEDS_INIT_CS
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
#define PERIPH_SPI_NEEDS_TRANSFER_REG
#define PERIPH_SPI_NEEDS_TRANSFER_REGS

#ifndef DOXYGEN

#define SPI_MODE_SEL(pol, pha)          ((pol << 3) | (pha << 2))

#define HAVE_SPI_MODE_T
typedef enum {
    SPI_MODE_0 = SPI_MODE_SEL(0, 0),    
    SPI_MODE_1 = SPI_MODE_SEL(0, 1),    
    SPI_MODE_2 = SPI_MODE_SEL(1, 0),    
    SPI_MODE_3 = SPI_MODE_SEL(1, 1)     
} spi_mode_t;
#define SPI_CLK_SEL(s2x, pr1, pr0)    ((s2x << 2) | (pr1 << 1) | pr0)

#define HAVE_SPI_CLK_T
typedef enum {
    SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1),      
    SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0),      
    SPI_CLK_1MHZ   = SPI_CLK_SEL(0, 0, 1),      
    SPI_CLK_5MHZ   = SPI_CLK_SEL(0, 0, 0),      
    SPI_CLK_10MHZ  = SPI_CLK_SEL(1, 0, 0)       
} spi_clk_t;
#endif /* ndef DOXYGEN */

typedef enum {
    TIMER_DIV1_8_64_128_1024 = 0x549,           
    TIMER_DIV1_8_32_64_128_256_1024 = 0x5E9,    
} timer_div_t;
typedef struct {
    mini_timer_t *dev;                  
    gpio_t pin_ch[2];                   
    timer_div_t div;                    
} pwm_conf_t;
#define EEPROM_CLEAR_BYTE              (0xff)

#define NWDT_TIME_LOWER_LIMIT           (1)
#define NWDT_TIME_UPPER_LIMIT           (8192U)

#define WDT_HAS_STOP                    (1)

#if defined(SCCR0) && !defined(RTT_BACKEND_SC)
#define RTT_BACKEND_SC   (1)
#endif

#if RTT_BACKEND_SC
/* For MCU with MAC symbol counter */
#ifndef RTT_MAX_VALUE
#define RTT_MAX_VALUE    (0xFFFFFFFFUL)  /* 32-bit timer */
#endif

#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY    (62500UL)       /* in Hz. */
#endif

#else
/* For MCU without MAC symbol counter */
#ifndef RTT_MAX_VALUE
#define RTT_MAX_VALUE    (0x00FFFFFF)    /* 24-bit timer */
#endif
/* possible values: 32, 128, 256, 512, 1024, 4096, 32768 */
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY    (1024U)         /* in Hz. */
#endif
#endif

#ifdef __cplusplus
}
#endif

#endif /* PERIPH_CPU_COMMON_H */