periph_cpu_common.h
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1 /*
2  * Copyright (C) 2015 HAW Hamburg
3  * 2016 Freie Universit├Ąt Berlin
4  * 2016 INRIA
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
23 #ifndef PERIPH_CPU_COMMON_H
24 #define PERIPH_CPU_COMMON_H
25 
26 #include "cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
32 #ifndef DOXYGEN
33 
37 #define HAVE_GPIO_T
38 typedef uint8_t gpio_t;
40 #endif
41 
45 #define GPIO_UNDEF (0xff)
46 
50 #define GPIO_PIN(x, y) ((x << 4) | y)
51 
61 #define HAVE_GPIO_FLANK_T
62 typedef enum {
67 } gpio_flank_t;
74 #define PERIPH_SPI_NEEDS_INIT_CS
75 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
76 #define PERIPH_SPI_NEEDS_TRANSFER_REG
77 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
78 
86 #define SPI_MODE_SEL(pol, pha) ((pol << 3) | (pha << 2))
87 
95 #define HAVE_SPI_MODE_T
96 typedef enum {
101 } spi_mode_t;
110 #define SPI_CLK_SEL(s2x, pr1, pr0) ((s2x << 2) | (pr1 << 1) | pr0)
111 
118 #define HAVE_SPI_CLK_T
119 typedef enum {
125 } spi_clk_t;
132 typedef enum {
135 } timer_div_t;
142 typedef struct {
144  gpio_t pin_ch[2];
146 } pwm_conf_t;
152 #define EEPROM_CLEAR_BYTE (0xff)
153 
154 #ifdef __cplusplus
155 }
156 #endif
157 
158 #endif /* PERIPH_CPU_COMMON_H */
159 
1/{1,8,64,128,1024}
gpio_flank_t
emit interrupt on rising flank
timer_div_t
Bitmasks indicating which are the possible dividers for a timer.
spi_mode_t
1/{1,8,32,64,128,256,1024}
emit interrupt when pin low
16/128 -> 125KHz
mini_timer_t * dev
Timer used.
8-bit timer register map
16/32 -> 500KHz
timer_div_t div
Timer divider mask.
#define SPI_MODE_SEL(pol, pha)
SPI mode select macro.
PWM configuration.
emit interrupt on both flanks
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:86
16/4 -> 4MHz
16/2 -> 8MHz
emit interrupt on falling flank
16/16 -> 1MHz
#define SPI_CLK_SEL(s2x, pr1, pr0)
SPI speed selection macro.