atmega_regs_common.h
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1 /*
2  * Copyright (C) 2016 Freie Universit├Ąt Berlin
3  * 2016 INRIA
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef ATMEGA_REGS_COMMON_H
22 #define ATMEGA_REGS_COMMON_H
23 
24 #include <avr/io.h>
25 #include <avr/power.h>
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 #define REG8 volatile uint8_t
36 #define REG16 volatile uint16_t
37 
42 typedef struct {
47  REG16 CNT;
48  REG16 ICR;
49  REG16 OCR[3];
50 } mega_timer_t;
51 
55 typedef struct {
60  REG16 BRR;
61  REG8 DR;
62 } mega_uart_t;
63 
68 #if defined(TCCR1A)
69 #define MEGA_TIMER1_BASE (uint16_t *)(&TCCR1A)
70 #define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
71 #endif
72 
73 #if defined(TCCR3A)
74 #define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
75 #define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
76 #endif
77 
78 #if defined(TCCR4A)
79 #define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
80 #define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
81 #endif
82 
83 #if defined(TCCR5A)
84 #define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
85 #define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
86 #endif
87 
94 #if defined(UCSR0A)
95 #define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
96 #define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
97 #endif
98 
99 #if defined(UCSR1A)
100 #define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
101 #define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
102 #endif
103 
104 #if defined(UCSR2A)
105 #define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
106 #define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
107 #endif
108 
109 #if defined(UCSR3A)
110 #define MEGA_UART3_BASE ((uint16_t *)(&UCSR3A))
111 #define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
112 #endif
113 
116 #ifdef __cplusplus
117 }
118 #endif
119 
120 #endif /* ATMEGA_REGS_COMMON_H */
121 
REG8 CRB
control B
REG8 CSRB
control and status register B
#define REG8
Register types.
UART register map.
REG8 CSRA
control and status register A
REG8 CRA
control A
REG8 DR
data register
Timer register map.
REG8 CRC
control C
REG8 reserved
reserved
REG8 reserved
reserved
REG8 CSRC
control and status register C