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atmega_regs_common.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2016 INRIA
4 * 2017 Thomas Perrot <thomas.perrot@tupi.fr>
5 * 2023 Hugues Larrive
6 *
7 * This file is subject to the terms and conditions of the GNU Lesser
8 * General Public License v2.1. See the file LICENSE in the top level
9 * directory for more details.
10 */
11
26#ifndef ATMEGA_REGS_COMMON_H
27#define ATMEGA_REGS_COMMON_H
28
29#include <avr/io.h>
30#include <avr/power.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
40#define REG8 volatile uint8_t
41#define REG16 volatile uint16_t
47#ifdef TCCR1C
48typedef struct {
49 REG8 CRA;
50 REG8 CRB;
51 REG8 CRC;
52 REG8 reserved;
53 REG16 CNT;
54 REG16 ICR;
55 REG16 OCR[3];
57#else /* atmega8 */
58typedef struct {
60 REG16 OCR[2];
65#endif
66
70typedef struct {
71#if ((defined(TCCR0A) && defined(TCCR0B)) || (defined(TCCR2A) && defined(TCCR2B)))
72 REG8 CRA;
73 REG8 CRB;
74 REG8 CNT;
75 REG8 OCR[2];
76#elif defined(TCCR2)
77 REG8 OCR;
78 REG8 CNT;
79 REG8 CR;
80#endif
82
86typedef struct {
87#if defined(UCSR0A) || defined(UCSR1A)
88 REG8 CSRA;
89 REG8 CSRB;
90 REG8 CSRC;
91#ifdef UCSR1D /* 32u4 */
92 REG8 CSRD;
93#else
94 REG8 reserved;
95#endif
96 REG16 BRR;
97 REG8 DR;
98#elif defined(UCSRA) /* atmega8 */
99 REG8 BRRL;
100 REG8 CSRB;
101 REG8 CSRA;
102 REG8 DR;
103 REG8 padding[19];
105 REG8 CSRC;
107#endif
109
114#if defined(TCCR0A)
115#define MINI_TIMER0 ((mini_timer_t *)(uint16_t *)(&TCCR0A))
116#define MINI_TIMER0_DIV TIMER_DIV1_8_64_128_1024
117#endif
118
119#if defined(TCCR1C)
120#define MEGA_TIMER1_BASE (uint16_t *)(&TCCR1A)
121#define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
122#elif defined(TCCR1A) /* atmega8 */
123#define MEGA_TIMER1_BASE (uint16_t *)(&ICR1L)
124#define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
125#endif
126
127#if defined(TCCR2A)
128#define MINI_TIMER2 ((mini_timer_t *)(uint16_t *)(&TCCR2A))
129#define MINI_TIMER2_DIV TIMER_DIV1_8_32_64_128_256_1024
130#elif defined(TCCR2) /* atmega8 */
131#define MINI_TIMER2 ((mini_timer_t *)(uint16_t *)(&OCR2))
132#define MINI_TIMER2_DIV TIMER_DIV1_8_32_64_128_256_1024
133#endif
134
135#if defined(TCCR3A)
136#define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
137#define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
138#endif
139
140#if defined(TCCR4A)
141#define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
142#define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
143#endif
144
145#if defined(TCCR5A)
146#define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
147#define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
148#endif
155#if defined(UCSRA)
156#define MEGA_UART_BASE ((uint16_t *)(&UBRRL))
157#define MEGA_UART ((mega_uart_t *)MEGA_UART_BASE)
158#endif
159
160#if defined(UCSR0A)
161#define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
162#define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
163#endif
164
165#if defined(UCSR1A)
166#define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
167#define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
168#endif
169
170#if defined(UCSR2A)
171#define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
172#define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
173#endif
174
175#if defined(UCSR3A)
176#define MEGA_UART3_BASE ((uint16_t *)(&UCSR3A))
177#define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
178#endif
181#ifdef __cplusplus
182}
183#endif
184
185#endif /* ATMEGA_REGS_COMMON_H */
#define REG8
Register types.
#define REG16(ADDR)
Type for 16-bit registers.
Definition periph_gba.h:37
Timer register map.
REG16 CNT
counter
REG8 CRA
control A
REG8 CRB
control B
REG16 ICR
input capture
UART register map.
8-bit timer register map