atmega_regs_common.h
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1 /*
2  * Copyright (C) 2016 Freie Universit├Ąt Berlin
3  * 2016 INRIA
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef ATMEGA_REGS_COMMON_H
22 #define ATMEGA_REGS_COMMON_H
23 
24 #include <avr/io.h>
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 #define REG8 volatile uint8_t
35 #define REG16 volatile uint16_t
36 
41 typedef struct {
46  REG16 CNT;
47  REG16 ICR;
48  REG16 OCR[3];
49 } mega_timer_t;
50 
54 typedef struct {
59  REG16 BRR;
60  REG8 DR;
61 } mega_uart_t;
62 
67 #if defined(TCCR1A)
68 #define MEGA_TIMER1_BASE (uint16_t *)(&TCCR1A)
69 #define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
70 #endif
71 
72 #if defined(TCCR3A)
73 #define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
74 #define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
75 #endif
76 
77 #if defined(TCCR4A)
78 #define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
79 #define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
80 #endif
81 
82 #if defined(TCCR5A)
83 #define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
84 #define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
85 #endif
86 
93 #if defined(UCSR0A)
94 #define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
95 #define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
96 #endif
97 
98 #if defined(UCSR1A)
99 #define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
100 #define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
101 #endif
102 
103 #if defined(UCSR2A)
104 #define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
105 #define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
106 #endif
107 
108 #if defined(UCSR3A)
109 #define MEGA_UART3_BASE ((uint16_t *)(&UCSR3A))
110 #define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
111 #endif
112 
115 #ifdef __cplusplus
116 }
117 #endif
118 
119 #endif /* ATMEGA_REGS_COMMON_H */
120 
REG8 CRB
control B
REG8 CSRB
control and status register B
#define REG8
Register types.
UART register map.
REG8 CSRA
control and status register A
REG8 CRA
control A
REG8 DR
data register
Timer register map.
REG8 CRC
control C
REG8 reserved
reserved
REG8 reserved
reserved
REG8 CSRC
control and status register C