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periph_conf.h
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1/*
2 * Copyright (C) 2022 SSV Software Systems GmbH
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
20
21#include <stdint.h>
22
23#include "cpu.h"
24#include "periph_cpu.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
34#define HFXO_FREQ (39000000UL)
35#define CMU_HFXOINIT CMU_HFXOINIT_DEFAULT
36
37#define LFXO_FREQ (32768UL)
38#define CMU_LFXOINIT CMU_LFXOINIT_DEFAULT
39
40static const clk_mux_t clk_mux_config[] = {
41 { .clk = cmuClock_SYSCLK, .src = cmuSelect_HFXO },
42 { .clk = cmuClock_EM01GRPACLK, .src = cmuSelect_HFXO },
43 { .clk = cmuClock_EM01GRPCCLK, .src = cmuSelect_HFXO },
44 { .clk = cmuClock_EM23GRPACLK, .src = cmuSelect_LFXO },
45 { .clk = cmuClock_EUSART0CLK, .src = cmuSelect_HFXO },
46};
47#define CLK_MUX_NUMOF ARRAY_SIZE(clk_mux_config)
48
49static const clk_div_t clk_div_config[] = {
50 { .clk = cmuClock_HCLK, .div = 1 },
51 { .clk = cmuClock_PCLK, .div = 1 },
52 { .clk = cmuClock_LSPCLK, .div = 2 },
53};
54#define CLK_DIV_NUMOF ARRAY_SIZE(clk_div_config)
56
61static const adc_conf_t adc_config[] = {
62 {
63 .dev = IADC0,
64 .cmu = cmuClock_IADC0,
65 .reference = iadcCfgReferenceInt1V2,
66 .reference_mV = 1210,
67 .gain = iadcCfgAnalogGain0P5x,
68 .available_res = { ADC_RES_10BIT, ADC_RES_16BIT }
69 }
70};
71
72static const adc_chan_conf_t adc_channel_config[] = {
73 {
74 .dev = 0,
75 .input_pos = GPIO_PIN(PA, 10),
76 .input_neg = GPIO_UNDEF
77 },
78 {
79 .dev = 0,
80 .input_pos = GPIO_PIN(PA, 0),
81 .input_neg = GPIO_PIN(PA, 5)
82 },
83};
84
85#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
86#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
88
93static const i2c_conf_t i2c_config[] = {
94 {
95 .dev = I2C0,
96 .sda_pin = GPIO_PIN(PC, 7),
97 .scl_pin = GPIO_PIN(PC, 5),
98 .cmu = cmuClock_I2C0,
99 .irq = I2C0_IRQn,
100 .speed = I2C_SPEED_NORMAL
101 }
102};
103
104#define I2C_NUMOF ARRAY_SIZE(i2c_config)
105#define I2C_0_ISR isr_i2c0
107
112static const spi_dev_t spi_config[] = {
113 {
114 .dev = USART0,
115 .mosi_pin = GPIO_PIN(PC, 1),
116 .miso_pin = GPIO_PIN(PC, 2),
117 .clk_pin = GPIO_PIN(PC, 3),
118 .cmu = cmuClock_USART0,
119 .irq = USART0_RX_IRQn
120 }
121};
122
123#define SPI_NUMOF ARRAY_SIZE(spi_config)
125
133static const timer_conf_t timer_config[] = {
134 {
135 .dev = TIMER0,
136 .cmu = cmuClock_TIMER0,
137 .irq = TIMER0_IRQn
138 },
139 {
140 .dev = LETIMER0,
141 .cmu = cmuClock_LETIMER0,
142 .irq = LETIMER0_IRQn
143 }
144};
145
146#define TIMER_0_ISR isr_timer0
147#define TIMER_1_ISR isr_letimer0
148
149#define TIMER_0_MAX_VALUE TIMER_MAX_VALUE
150#define TIMER_1_MAX_VALUE LETIMER_MAX_VALUE
151
152#define TIMER_NUMOF ARRAY_SIZE(timer_config)
154
159static const uart_conf_t uart_config[] = {
160 {
161 .dev = EUSART1,
162 .rx_pin = GPIO_PIN(PA, 9),
163 .tx_pin = GPIO_PIN(PA, 8),
164 .cmu = cmuClock_EUSART1,
165 .irq = EUSART1_RX_IRQn
166 }
167};
168#define UART_0_ISR_RX isr_eusart1_rx
169
170#define UART_NUMOF ARRAY_SIZE(uart_config)
172
173#ifdef __cplusplus
174}
175#endif
176
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition adc.h:98
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition adc.h:95
@ PC
port C
@ PA
port A
ADC channel configuration.
Definition periph_cpu.h:385
ADC device configuration.
Definition periph_cpu.h:377
Clock divider configuration.
Definition periph_cpu.h:61
Clock mux configuration.
Definition periph_cpu.h:53
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:516
Timer device configuration.
Definition periph_cpu.h:263
UART device configuration.
Definition periph_cpu.h:217