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periph_conf.h
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1/*
2 * Copyright (C) 2020 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22/* Add specific clock configuration (HSE, LSE) for this board here */
23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
25#endif
26
27#include "periph_cpu.h"
28#include "clk_conf.h"
29#include "cfg_i2c1_pb6_pb7.h"
30#include "cfg_rtt_default.h"
31#include "cfg_timer_tim2.h"
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
41static const uart_conf_t uart_config[] = {
42 {
43 .dev = USART2,
44 .rcc_mask = RCC_APB1ENR_USART2EN,
45 .rx_pin = GPIO_PIN(PORT_A, 15),
46 .tx_pin = GPIO_PIN(PORT_A, 2),
47 .rx_af = GPIO_AF4,
48 .tx_af = GPIO_AF4,
49 .bus = APB1,
50 .irqn = USART2_IRQn,
51 .type = STM32_USART,
52 .clk_src = 0, /* Use APB clock */
53 }
54};
55
56#define UART_0_ISR (isr_usart2)
57
58#define UART_NUMOF ARRAY_SIZE(uart_config)
65static const spi_conf_t spi_config[] = {
66 {
67 .dev = SPI1,
68 .mosi_pin = GPIO_PIN(PORT_B, 5),
69 .miso_pin = GPIO_PIN(PORT_B, 4),
70 .sclk_pin = GPIO_PIN(PORT_B, 3),
71 .cs_pin = SPI_CS_UNDEF,
72 .mosi_af = GPIO_AF0,
73 .miso_af = GPIO_AF0,
74 .sclk_af = GPIO_AF0,
75 .cs_af = GPIO_AF0,
76 .rccmask = RCC_APB2ENR_SPI1EN,
77 .apbbus = APB2
78 }
79};
80
81#define SPI_NUMOF ARRAY_SIZE(spi_config)
88static const adc_conf_t adc_config[] = {
89 { GPIO_PIN(PORT_A, 0), 0 }, /* Pin A0 */
90 { GPIO_PIN(PORT_A, 1), 1 }, /* Pin A1 */
91 { GPIO_PIN(PORT_A, 3), 3 }, /* Pin A2 */
92 { GPIO_PIN(PORT_A, 4), 4 }, /* Pin A3 */
93 { GPIO_PIN(PORT_A, 5), 5 }, /* Pin A4 */
94 { GPIO_PIN(PORT_A, 6), 6 }, /* Pin A5 */
95 { GPIO_PIN(PORT_A, 7), 7 }, /* Pin A6 */
96};
97
98#define ADC_NUMOF ARRAY_SIZE(adc_config)
101#ifdef __cplusplus
102}
103#endif
104
105#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ GPIO_AF0
use alternate function 0
Definition cpu_gpio.h:102
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219