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periph_conf.h
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1/*
2 * Copyright (C) 2017 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22/* This board provides an LSE */
23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
25#endif
26
27/* This board provides an HSE */
28#ifndef CONFIG_BOARD_HAS_HSE
29#define CONFIG_BOARD_HAS_HSE 1
30#endif
31
32#include "periph_cpu.h"
33#include "clk_conf.h"
34#include "cfg_i2c1_pb8_pb9.h"
35#include "cfg_rtt_default.h"
36#include "cfg_timer_tim2.h"
37#include "cfg_usb_otg_fs.h"
38
39#ifdef __cplusplus
40extern "C" {
41#endif
42
47static const uart_conf_t uart_config[] = {
48 {
49 .dev = USART3,
50 .rcc_mask = RCC_APB1ENR_USART3EN,
51 .rx_pin = GPIO_PIN(PORT_D, 9),
52 .tx_pin = GPIO_PIN(PORT_D, 8),
53 .rx_af = GPIO_AF7,
54 .tx_af = GPIO_AF7,
55 .bus = APB1,
56 .irqn = USART3_IRQn,
57#ifdef UART_USE_DMA
58 .dma_stream = 6,
59 .dma_chan = 4
60#endif
61 },
62 {
63 .dev = USART6,
64 .rcc_mask = RCC_APB2ENR_USART6EN,
65 .rx_pin = GPIO_PIN(PORT_G, 9),
66 .tx_pin = GPIO_PIN(PORT_G, 14),
67 .rx_af = GPIO_AF8,
68 .tx_af = GPIO_AF8,
69 .bus = APB2,
70 .irqn = USART6_IRQn,
71#ifdef UART_USE_DMA
72 .dma_stream = 5,
73 .dma_chan = 4
74#endif
75 },
76 {
77 .dev = USART2,
78 .rcc_mask = RCC_APB1ENR_USART2EN,
79 .rx_pin = GPIO_PIN(PORT_D, 6),
80 .tx_pin = GPIO_PIN(PORT_D, 5),
81 .rx_af = GPIO_AF7,
82 .tx_af = GPIO_AF7,
83 .bus = APB1,
84 .irqn = USART2_IRQn,
85#ifdef UART_USE_DMA
86 .dma_stream = 4,
87 .dma_chan = 4
88#endif
89 }
90};
91
92#define UART_0_ISR (isr_usart3)
93#define UART_0_DMA_ISR (isr_dma1_stream6)
94#define UART_1_ISR (isr_usart6)
95#define UART_1_DMA_ISR (isr_dma1_stream5)
96#define UART_2_ISR (isr_usart2)
97#define UART_2_DMA_ISR (isr_dma1_stream4)
98
99#define UART_NUMOF ARRAY_SIZE(uart_config)
102#ifdef __cplusplus
103}
104#endif
105
106#endif /* PERIPH_CONF_H */
@ PORT_G
port G
Definition periph_cpu.h:53
@ PORT_D
port D
Definition periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
Common configuration for STM32 OTG FS peripheral.
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219