23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
28#ifndef CONFIG_BOARD_HAS_HSE
29#define CONFIG_BOARD_HAS_HSE 1
32#include "periph_cpu.h"
35#include "cfg_rtt_default.h"
50 .rcc_mask = RCC_APB1ENR_USART3EN,
64 .rcc_mask = RCC_APB2ENR_USART6EN,
78 .rcc_mask = RCC_APB1ENR_USART2EN,
92#define UART_0_ISR (isr_usart3)
93#define UART_0_DMA_ISR (isr_dma1_stream6)
94#define UART_1_ISR (isr_usart6)
95#define UART_1_DMA_ISR (isr_dma1_stream5)
96#define UART_2_ISR (isr_usart2)
97#define UART_2_DMA_ISR (isr_dma1_stream4)
99#define UART_NUMOF ARRAY_SIZE(uart_config)
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
Common configuration for STM32 OTG FS peripheral.
@ GPIO_AF8
use alternate function 8
@ GPIO_AF7
use alternate function 7
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
UART device configuration.
USART_t * dev
pointer to the used UART device