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periph_conf.h
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1/*
2 * Copyright (C) 2020 Locha Inc
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#include "periph_cpu.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
33/* the main clock is fixed to 48MHZ */
34#define CLOCK_CORECLOCK (48000000U)
45static const timer_conf_t timer_config[] = {
46 {
47 .cfg = GPT_CFG_16T,
48 .chn = 2,
49 },
50 {
51 .cfg = GPT_CFG_32T,
52 .chn = 1,
53 },
54 {
55 .cfg = GPT_CFG_16T,
56 .chn = 2,
57 },
58 {
59 .cfg = GPT_CFG_32T,
60 .chn = 1,
61 }
62};
63
64#define TIMER_NUMOF ARRAY_SIZE(timer_config)
79static const uart_conf_t uart_config[] = {
80 {
81 .regs = UART0,
82 .tx_pin = 13,
83 .rx_pin = 12,
84#ifdef MODULE_PERIPH_UART_HW_FC
85 .rts_pin = GPIO_UNDEF,
86 .cts_pin = GPIO_UNDEF,
87#endif
88 .intn = UART0_IRQN
89 },
90 {
91 .regs = UART1,
92 .tx_pin = 26,
93 .rx_pin = 25,
94#ifdef MODULE_PERIPH_UART_HW_FC
95 .rts_pin = GPIO_UNDEF,
96 .cts_pin = GPIO_UNDEF,
97#endif
98 .intn = UART1_IRQN
99 }
100};
101#define UART_NUMOF ARRAY_SIZE(uart_config)
108#define I2C_NUMOF (1)
109#define I2C_SCL_PIN (21)
110#define I2C_SDA_PIN (5)
113#ifdef __cplusplus
114}
115#endif
116
117#endif /* PERIPH_CONF_H */
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
#define GPT_CFG_32T
GPT register values.
@ UART0_IRQN
21 UART0 Rx and Tx
#define UART0
UART0 register bank.
#define UART1
UART1 register bank.
Timer device configuration.
Definition periph_cpu.h:264
uint_fast8_t cfg
timer config word
Definition periph_cpu.h:312
UART device configuration.
Definition periph_cpu.h:218
gpio_t tx_pin
pin used for TX
Definition periph_cpu.h:222