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periph_conf.h File Reference

Peripheral MCU configuration for the ATxmegaA1U Xplained Pro board. More...

Detailed Description

Peripheral MCU configuration for the ATxmegaA1U Xplained Pro board.

Author
Gerson Fernando Budke nando.nosp@m.jve@.nosp@m.gmail.nosp@m..com

Definition in file periph_conf.h.

#include "mutex.h"
#include <stdint.h>
#include <avr/io.h>
#include "periph_cpu.h"
#include "periph_conf_common.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Timer peripheral configuration

#define TIMER_0_ISRA   TCC1_CCA_vect
 
#define TIMER_1_ISRA   TCC0_CCA_vect
 
#define TIMER_1_ISRB   TCC0_CCB_vect
 
#define TIMER_1_ISRC   TCC0_CCC_vect
 
#define TIMER_1_ISRD   TCC0_CCD_vect
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_RXC_ISR   USARTE0_RXC_vect /* Reception Complete Interrupt */
 
#define UART_0_DRE_ISR   USARTE0_DRE_vect /* Data Register Empty Interrupt */
 
#define UART_0_TXC_ISR   USARTE0_TXC_vect /* Transmission Complete Interrupt */
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

I2C configuration

#define I2C_0_ISR   TWIC_TWIM_vect
 
#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

EBI configuration

For more information, see ebi_conf_t structure.

static const ebi_conf_t ebi_config
 

Macro Definition Documentation

◆ I2C_0_ISR

#define I2C_0_ISR   TWIC_TWIM_vect

Definition at line 110 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)

Definition at line 112 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 130 of file periph_conf.h.

◆ TIMER_0_ISRA

#define TIMER_0_ISRA   TCC1_CCA_vect

Definition at line 57 of file periph_conf.h.

◆ TIMER_1_ISRA

#define TIMER_1_ISRA   TCC0_CCA_vect

Definition at line 59 of file periph_conf.h.

◆ TIMER_1_ISRB

#define TIMER_1_ISRB   TCC0_CCB_vect

Definition at line 60 of file periph_conf.h.

◆ TIMER_1_ISRC

#define TIMER_1_ISRC   TCC0_CCC_vect

Definition at line 61 of file periph_conf.h.

◆ TIMER_1_ISRD

#define TIMER_1_ISRD   TCC0_CCD_vect

Definition at line 62 of file periph_conf.h.

◆ TIMER_NUMOF

#define TIMER_NUMOF   ARRAY_SIZE(timer_config)

Definition at line 64 of file periph_conf.h.

◆ UART_0_DRE_ISR

#define UART_0_DRE_ISR   USARTE0_DRE_vect /* Data Register Empty Interrupt */

Definition at line 89 of file periph_conf.h.

◆ UART_0_RXC_ISR

#define UART_0_RXC_ISR   USARTE0_RXC_vect /* Reception Complete Interrupt */

Definition at line 88 of file periph_conf.h.

◆ UART_0_TXC_ISR

#define UART_0_TXC_ISR   USARTE0_TXC_vect /* Transmission Complete Interrupt */

Definition at line 90 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 92 of file periph_conf.h.

Variable Documentation

◆ ebi_config

const ebi_conf_t ebi_config
static
Initial value:
= {
.addr_bits = 18,
.flags = (EBI_PORT_LPC | EBI_PORT_CS2),
.sram_ale = 0,
.lpc_ale = 2,
.sdram = { 0 },
.cs = {
{ EBI_CS_MODE_DISABLED_gc,
0,
EBI_CS_SRWS_0CLK_gc,
0x0UL,
},
{ EBI_CS_MODE_DISABLED_gc,
0,
EBI_CS_SRWS_0CLK_gc,
0x0UL,
},
{ EBI_CS_MODE_LPC_gc,
EBI_CS_ASIZE_256KB_gc,
EBI_CS_SRWS_1CLK_gc,
0x0UL,
},
{ EBI_CS_MODE_DISABLED_gc,
0,
EBI_CS_SRWS_0CLK_gc,
0x0UL,
},
},
}

Definition at line 140 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = &TWIC,
.pwr = PWR_RED_REG(PWR_PORT_C, PR_TWI_bm),
.sda_pin = GPIO_PIN(PORT_C, 0),
.scl_pin = GPIO_PIN(PORT_C, 1),
.speed = I2C_SPEED_NORMAL,
.int_lvl = CPU_INT_LVL_LOW,
},
}
@ PORT_C
port C
Definition periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define PWR_RED_REG(reg, dev)
Define a CPU specific Power Reduction index macro.
Definition periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ CPU_INT_LVL_LOW
Interrupt Low Level
Definition periph_cpu.h:41

Definition at line 99 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = &SPIC,
.pwr = PWR_RED_REG(PWR_PORT_C, PR_SPI_bm),
.sck_pin = GPIO_PIN(PORT_C, 7),
.miso_pin = GPIO_PIN(PORT_C, 6),
.mosi_pin = GPIO_PIN(PORT_C, 5),
.ss_pin = GPIO_PIN(PORT_C, 4),
},
}

Definition at line 119 of file periph_conf.h.

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = (void *)&TCC1,
.pwr = PWR_RED_REG(PWR_PORT_C, PR_TC1_bm),
.type = TC_TYPE_1,
.int_lvl = { CPU_INT_LVL_LOW,
},
{
.dev = (void *)&TCC0,
.pwr = PWR_RED_REG(PWR_PORT_C, PR_TC0_bm),
.type = TC_TYPE_0,
.int_lvl = { CPU_INT_LVL_LOW,
}
}
@ CPU_INT_LVL_OFF
Interrupt Disabled
Definition periph_cpu.h:40

Definition at line 36 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = &USARTE0,
.pwr = PWR_RED_REG(PWR_PORT_E, PR_USART0_bm),
.rx_pin = GPIO_PIN(PORT_E, 2),
.tx_pin = GPIO_PIN(PORT_E, 3),
.rx_int_lvl = CPU_INT_LVL_LOW,
.tx_int_lvl = CPU_INT_LVL_LOW,
.dre_int_lvl = CPU_INT_LVL_OFF,
},
}
@ PORT_E
port E
Definition periph_cpu.h:51

Definition at line 71 of file periph_conf.h.