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periph_conf.h
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1/*
2 * Copyright (C) 2017 Kees Bakker, SODAQ
3 * 2018 HAW Hamburg
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
10#pragma once
11
22
23#include <stdint.h>
24
25#include "cpu.h"
26#include "periph_cpu.h"
27#include "cfg_clock_default.h"
28#include "cfg_rtc_default.h"
29#include "cfg_rtt_default.h"
30#include "cfg_spi_default.h"
31#include "cfg_timer_default.h"
32#include "cfg_usbdev_default.h"
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
43static const uart_conf_t uart_config[] = {
44 {
45 .dev = &SERCOM5->USART,
46 .rx_pin = GPIO_PIN(PB, 30), /* D0, RX Pin */
47 .tx_pin = GPIO_PIN(PB, 31), /* D1, TX Pin */
48#ifdef MODULE_PERIPH_UART_HW_FC
49 .rts_pin = GPIO_UNDEF,
50 .cts_pin = GPIO_UNDEF,
51#endif
52 .mux = GPIO_MUX_D,
53 .rx_pad = UART_PAD_RX_1,
54 .tx_pad = UART_PAD_TX_0,
55 .flags = UART_FLAG_NONE,
56 .gclk_src = SAM0_GCLK_MAIN,
57 },
58 {
59 .dev = &SERCOM0->USART,
60 .rx_pin = GPIO_PIN(PA,5),
61 .tx_pin = GPIO_PIN(PA,6),
62#ifdef MODULE_PERIPH_UART_HW_FC
63 .rts_pin = GPIO_UNDEF,
64 .cts_pin = GPIO_UNDEF,
65#endif
66 .mux = GPIO_MUX_D,
67 .rx_pad = UART_PAD_RX_1,
68 .tx_pad = UART_PAD_TX_2,
69 .flags = UART_FLAG_NONE,
70 .gclk_src = SAM0_GCLK_MAIN,
71 },
72};
73
74/* interrupt function name mapping */
75#define UART_0_ISR isr_sercom5
76#define UART_1_ISR isr_sercom0
77
78#define UART_NUMOF ARRAY_SIZE(uart_config)
80
85
86/* ADC Default values */
87#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
88
89#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
90#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
91#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
92
93static const adc_conf_chan_t adc_channels[] = {
94 /* port, pin, muxpos */
95 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB00 }, /* A0 */
96 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB01 }, /* A1 */
97 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A2 */
98 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* A3 */
99 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA08 }, /* A4 */
100 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA09 }, /* A5 */
101 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 }, /* GROVE1/A6 */
102 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 }, /* GROVE2/A7 */
103 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB05 }, /* BAT_VOLT/A8 */
104 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* D2/DAC */
105 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 }, /* AREF */
106};
107
108#define ADC_NUMOF ARRAY_SIZE(adc_channels)
110
115static const i2c_conf_t i2c_config[] = {
116 {
117 .dev = &(SERCOM1->I2CM),
118 .speed = I2C_SPEED_NORMAL,
119 .scl_pin = GPIO_PIN(PA, 17),
120 .sda_pin = GPIO_PIN(PA, 16),
121 .mux = GPIO_MUX_C,
122 .gclk_src = SAM0_GCLK_MAIN,
123 .flags = I2C_FLAG_NONE
124 }
125};
126#define I2C_NUMOF ARRAY_SIZE(i2c_config)
128
129#ifdef __cplusplus
130}
131#endif
132
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
Default RTC configuration for SODAQ boards.
@ UART_PAD_RX_1
select pad 1
@ I2C_FLAG_NONE
No flags set.
@ UART_FLAG_NONE
No flags set.
@ PB
port B
@ PA
port A
@ UART_PAD_TX_0
select pad 0
@ UART_PAD_TX_2
select pad 2
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition periph_cpu.h:136
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA08
Alias for PIN16.
Definition periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PA09
Alias for PIN17.
Definition periph_cpu.h:135
#define ADC_INPUTCTRL_MUXPOS_PB01
Alias for PIN9.
Definition periph_cpu.h:127
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PB05
Alias for PIN13.
Definition periph_cpu.h:131
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:118
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition periph_cpu.h:119
#define ADC_INPUTCTRL_MUXPOS_PB00
Alias for PIN8.
Definition periph_cpu.h:126
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:298
UART device configuration.
Definition periph_cpu.h:217