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Data Structures | Macros | Functions | Variables
periph_cpu.h File Reference
CPU » Atmel SAMD10/SAMD20/SAMD21/SAMR21

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

CPU specific definitions for internal peripheral handling

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file periph_cpu.h.

#include <limits.h>
#include "periph_cpu_common.h"
+ Include dependency graph for periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  sam0_aux_cfg_mapping
 NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on. More...
 

Macros

#define PM_BLOCKER_INITIAL   { 1, 0, 0, 0 }
 Override the default initial PM blocker Idle modes are enabled by default, deep sleep mode blocked.
 
#define SPI_HWCS(x)
 Override SPI hardware chip select macro.
 
#define DAC_RES_BITS   (10)
 The MCU has a 10 bit DAC.
 
#define DAC_NUMOF   (1)
 The MCU has one DAC Output.
 

Functions

static int _sercom_id (SercomUsart *sercom)
 Return the numeric id of a SERCOM device derived from its address.
 

Variables

static const gpio_t sam0_adc_pins [1][20]
 Pins that can be used for ADC input.
 

Power mode configuration

#define PM_NUM_MODES   (4)
 

SAMD21 sleep modes for PM

#define SAMD21_PM_STANDBY   (0U)
 Standby mode (stops main clock)
 
#define SAMD21_PM_IDLE_2   (1U)
 Idle 2 (stops AHB, APB and CPU)
 
#define SAMD21_PM_IDLE_1   (2U)
 Idle 1 (stops AHB and CPU)
 
#define SAMD21_PM_IDLE_0   (3U)
 Idle 0 (stops CPU)
 

SPI configuration

#define SAM0_SPI_PM_BLOCK   SAMD21_PM_IDLE_1
 Stay in Idle 0 mode.
 

USB configuration

#define SAM0_USB_ACTIVE_PM_BLOCK   SAMD21_PM_IDLE_1
 Stay in Idle 0 mode.
 
#define ADC_INPUTCTRL_MUXPOS_PA02   ADC_INPUTCTRL_MUXPOS_PIN0
 ADC pin aliases.
 
#define ADC_INPUTCTRL_MUXPOS_PA03   ADC_INPUTCTRL_MUXPOS_PIN1
 Alias for PIN1.
 
#define ADC_INPUTCTRL_MUXPOS_PB08   ADC_INPUTCTRL_MUXPOS_PIN2
 Alias for PIN2.
 
#define ADC_INPUTCTRL_MUXPOS_PB09   ADC_INPUTCTRL_MUXPOS_PIN3
 Alias for PIN3.
 
#define ADC_INPUTCTRL_MUXPOS_PA04   ADC_INPUTCTRL_MUXPOS_PIN4
 Alias for PIN4.
 
#define ADC_INPUTCTRL_MUXPOS_PA05   ADC_INPUTCTRL_MUXPOS_PIN5
 Alias for PIN5.
 
#define ADC_INPUTCTRL_MUXPOS_PA06   ADC_INPUTCTRL_MUXPOS_PIN6
 Alias for PIN6.
 
#define ADC_INPUTCTRL_MUXPOS_PA07   ADC_INPUTCTRL_MUXPOS_PIN7
 Alias for PIN7.
 
#define ADC_INPUTCTRL_MUXPOS_PB00   ADC_INPUTCTRL_MUXPOS_PIN8
 Alias for PIN8.
 
#define ADC_INPUTCTRL_MUXPOS_PB01   ADC_INPUTCTRL_MUXPOS_PIN9
 Alias for PIN9.
 
#define ADC_INPUTCTRL_MUXPOS_PB02   ADC_INPUTCTRL_MUXPOS_PIN10
 Alias for PIN10.
 
#define ADC_INPUTCTRL_MUXPOS_PB03   ADC_INPUTCTRL_MUXPOS_PIN11
 Alias for PIN11.
 
#define ADC_INPUTCTRL_MUXPOS_PB04   ADC_INPUTCTRL_MUXPOS_PIN12
 Alias for PIN12.
 
#define ADC_INPUTCTRL_MUXPOS_PB05   ADC_INPUTCTRL_MUXPOS_PIN13
 Alias for PIN13.
 
#define ADC_INPUTCTRL_MUXPOS_PB06   ADC_INPUTCTRL_MUXPOS_PIN14
 Alias for PIN14.
 
#define ADC_INPUTCTRL_MUXPOS_PB07   ADC_INPUTCTRL_MUXPOS_PIN15
 Alias for PIN15.
 
#define ADC_INPUTCTRL_MUXPOS_PA08   ADC_INPUTCTRL_MUXPOS_PIN16
 Alias for PIN16.
 
#define ADC_INPUTCTRL_MUXPOS_PA09   ADC_INPUTCTRL_MUXPOS_PIN17
 Alias for PIN17.
 
#define ADC_INPUTCTRL_MUXPOS_PA10   ADC_INPUTCTRL_MUXPOS_PIN18
 Alias for PIN18.
 
#define ADC_INPUTCTRL_MUXPOS_PA11   ADC_INPUTCTRL_MUXPOS_PIN19
 Alias for PIN19.
 
#define ADC_INPUTCTRL_MUXNEG_PA02   ADC_INPUTCTRL_MUXPOS_PIN0
 Alias for PIN0.
 
#define ADC_INPUTCTRL_MUXNEG_PA03   ADC_INPUTCTRL_MUXPOS_PIN1
 Alias for PIN1.
 
#define ADC_INPUTCTRL_MUXNEG_PB08   ADC_INPUTCTRL_MUXPOS_PIN2
 Alias for PIN2.
 
#define ADC_INPUTCTRL_MUXNEG_PB09   ADC_INPUTCTRL_MUXPOS_PIN3
 Alias for PIN3.
 
#define ADC_INPUTCTRL_MUXNEG_PA04   ADC_INPUTCTRL_MUXPOS_PIN4
 Alias for PIN4.
 
#define ADC_INPUTCTRL_MUXNEG_PA05   ADC_INPUTCTRL_MUXPOS_PIN5
 Alias for PIN5.
 
#define ADC_INPUTCTRL_MUXNEG_PA06   ADC_INPUTCTRL_MUXPOS_PIN6
 Alias for PIN6.
 
#define ADC_INPUTCTRL_MUXNEG_PA07   ADC_INPUTCTRL_MUXPOS_PIN7
 Alias for PIN7.
 

Real time counter configuration

#define RTT_RUNSTDBY   (1) /* Keep RTT running in sleep states */
 
#define RTT_MAX_VALUE   (0xffffffff)
 
#define RTT_CLOCK_FREQUENCY   (32768U) /* in Hz */
 
#define RTT_MIN_FREQUENCY   (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
 
#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY) /* in Hz */
 

SAMD21 GCLK definitions

enum  {
  SAM0_GCLK_MAIN = 0 , SAM0_GCLK_1MHZ , SAM0_GCLK_32KHZ , SAM0_GCLK_1KHZ ,
  SAM0_GCLK_DISABLED = 0xF
}
 

Macro Definition Documentation

◆ ADC_INPUTCTRL_MUXNEG_PA02

#define ADC_INPUTCTRL_MUXNEG_PA02   ADC_INPUTCTRL_MUXPOS_PIN0

Alias for PIN0.

Definition at line 136 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PA03

#define ADC_INPUTCTRL_MUXNEG_PA03   ADC_INPUTCTRL_MUXPOS_PIN1

Alias for PIN1.

Definition at line 137 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PA04

#define ADC_INPUTCTRL_MUXNEG_PA04   ADC_INPUTCTRL_MUXPOS_PIN4

Alias for PIN4.

Definition at line 140 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PA05

#define ADC_INPUTCTRL_MUXNEG_PA05   ADC_INPUTCTRL_MUXPOS_PIN5

Alias for PIN5.

Definition at line 141 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PA06

#define ADC_INPUTCTRL_MUXNEG_PA06   ADC_INPUTCTRL_MUXPOS_PIN6

Alias for PIN6.

Definition at line 142 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PA07

#define ADC_INPUTCTRL_MUXNEG_PA07   ADC_INPUTCTRL_MUXPOS_PIN7

Alias for PIN7.

Definition at line 143 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PB08

#define ADC_INPUTCTRL_MUXNEG_PB08   ADC_INPUTCTRL_MUXPOS_PIN2

Alias for PIN2.

Definition at line 138 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXNEG_PB09

#define ADC_INPUTCTRL_MUXNEG_PB09   ADC_INPUTCTRL_MUXPOS_PIN3

Alias for PIN3.

Definition at line 139 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA02

#define ADC_INPUTCTRL_MUXPOS_PA02   ADC_INPUTCTRL_MUXPOS_PIN0

ADC pin aliases.

Alias for PIN0

Definition at line 115 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA03

#define ADC_INPUTCTRL_MUXPOS_PA03   ADC_INPUTCTRL_MUXPOS_PIN1

Alias for PIN1.

Definition at line 116 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA04

#define ADC_INPUTCTRL_MUXPOS_PA04   ADC_INPUTCTRL_MUXPOS_PIN4

Alias for PIN4.

Definition at line 119 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA05

#define ADC_INPUTCTRL_MUXPOS_PA05   ADC_INPUTCTRL_MUXPOS_PIN5

Alias for PIN5.

Definition at line 120 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA06

#define ADC_INPUTCTRL_MUXPOS_PA06   ADC_INPUTCTRL_MUXPOS_PIN6

Alias for PIN6.

Definition at line 121 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA07

#define ADC_INPUTCTRL_MUXPOS_PA07   ADC_INPUTCTRL_MUXPOS_PIN7

Alias for PIN7.

Definition at line 122 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA08

#define ADC_INPUTCTRL_MUXPOS_PA08   ADC_INPUTCTRL_MUXPOS_PIN16

Alias for PIN16.

Definition at line 131 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA09

#define ADC_INPUTCTRL_MUXPOS_PA09   ADC_INPUTCTRL_MUXPOS_PIN17

Alias for PIN17.

Definition at line 132 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA10

#define ADC_INPUTCTRL_MUXPOS_PA10   ADC_INPUTCTRL_MUXPOS_PIN18

Alias for PIN18.

Definition at line 133 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PA11

#define ADC_INPUTCTRL_MUXPOS_PA11   ADC_INPUTCTRL_MUXPOS_PIN19

Alias for PIN19.

Definition at line 134 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB00

#define ADC_INPUTCTRL_MUXPOS_PB00   ADC_INPUTCTRL_MUXPOS_PIN8

Alias for PIN8.

Definition at line 123 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB01

#define ADC_INPUTCTRL_MUXPOS_PB01   ADC_INPUTCTRL_MUXPOS_PIN9

Alias for PIN9.

Definition at line 124 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB02

#define ADC_INPUTCTRL_MUXPOS_PB02   ADC_INPUTCTRL_MUXPOS_PIN10

Alias for PIN10.

Definition at line 125 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB03

#define ADC_INPUTCTRL_MUXPOS_PB03   ADC_INPUTCTRL_MUXPOS_PIN11

Alias for PIN11.

Definition at line 126 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB04

#define ADC_INPUTCTRL_MUXPOS_PB04   ADC_INPUTCTRL_MUXPOS_PIN12

Alias for PIN12.

Definition at line 127 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB05

#define ADC_INPUTCTRL_MUXPOS_PB05   ADC_INPUTCTRL_MUXPOS_PIN13

Alias for PIN13.

Definition at line 128 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB06

#define ADC_INPUTCTRL_MUXPOS_PB06   ADC_INPUTCTRL_MUXPOS_PIN14

Alias for PIN14.

Definition at line 129 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB07

#define ADC_INPUTCTRL_MUXPOS_PB07   ADC_INPUTCTRL_MUXPOS_PIN15

Alias for PIN15.

Definition at line 130 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB08

#define ADC_INPUTCTRL_MUXPOS_PB08   ADC_INPUTCTRL_MUXPOS_PIN2

Alias for PIN2.

Definition at line 117 of file periph_cpu.h.

◆ ADC_INPUTCTRL_MUXPOS_PB09

#define ADC_INPUTCTRL_MUXPOS_PB09   ADC_INPUTCTRL_MUXPOS_PIN3

Alias for PIN3.

Definition at line 118 of file periph_cpu.h.

◆ DAC_NUMOF

#define DAC_NUMOF   (1)

The MCU has one DAC Output.

Definition at line 154 of file periph_cpu.h.

◆ DAC_RES_BITS

#define DAC_RES_BITS   (10)

The MCU has a 10 bit DAC.

Definition at line 149 of file periph_cpu.h.

◆ PM_BLOCKER_INITIAL

#define PM_BLOCKER_INITIAL   { 1, 0, 0, 0 }

Override the default initial PM blocker Idle modes are enabled by default, deep sleep mode blocked.

Definition at line 39 of file periph_cpu.h.

◆ PM_NUM_MODES

#define PM_NUM_MODES   (4)

Definition at line 31 of file periph_cpu.h.

◆ RTT_CLOCK_FREQUENCY

#define RTT_CLOCK_FREQUENCY   (32768U) /* in Hz */

Definition at line 163 of file periph_cpu.h.

◆ RTT_MAX_FREQUENCY

#define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY) /* in Hz */

Definition at line 165 of file periph_cpu.h.

◆ RTT_MAX_VALUE

#define RTT_MAX_VALUE   (0xffffffff)

Definition at line 162 of file periph_cpu.h.

◆ RTT_MIN_FREQUENCY

#define RTT_MIN_FREQUENCY   (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */

Definition at line 164 of file periph_cpu.h.

◆ RTT_RUNSTDBY

#define RTT_RUNSTDBY   (1) /* Keep RTT running in sleep states */

Definition at line 160 of file periph_cpu.h.

◆ SAM0_SPI_PM_BLOCK

#define SAM0_SPI_PM_BLOCK   SAMD21_PM_IDLE_1

Stay in Idle 0 mode.

Definition at line 56 of file periph_cpu.h.

◆ SAM0_USB_ACTIVE_PM_BLOCK

#define SAM0_USB_ACTIVE_PM_BLOCK   SAMD21_PM_IDLE_1

Stay in Idle 0 mode.

Definition at line 63 of file periph_cpu.h.

◆ SAMD21_PM_IDLE_0

#define SAMD21_PM_IDLE_0   (3U)

Idle 0 (stops CPU)

Definition at line 49 of file periph_cpu.h.

◆ SAMD21_PM_IDLE_1

#define SAMD21_PM_IDLE_1   (2U)

Idle 1 (stops AHB and CPU)

Definition at line 48 of file periph_cpu.h.

◆ SAMD21_PM_IDLE_2

#define SAMD21_PM_IDLE_2   (1U)

Idle 2 (stops AHB, APB and CPU)

Definition at line 47 of file periph_cpu.h.

◆ SAMD21_PM_STANDBY

#define SAMD21_PM_STANDBY   (0U)

Standby mode (stops main clock)

Definition at line 46 of file periph_cpu.h.

◆ SPI_HWCS

#define SPI_HWCS ( x)
Value:
(UINT_MAX - 1)

Override SPI hardware chip select macro.

As of now, we do not support HW CS, so we always set it to a fixed value

Definition at line 84 of file periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
SAM0_GCLK_MAIN 

48 MHz main clock

SAM0_GCLK_1MHZ 

1 MHz clock for xTimer

SAM0_GCLK_32KHZ 

32 kHz clock

SAM0_GCLK_1KHZ 

1 kHz clock

SAM0_GCLK_DISABLED 

disabled GCLK

Definition at line 70 of file periph_cpu.h.

Function Documentation

◆ _sercom_id()

static int _sercom_id ( SercomUsart * sercom)
inlinestatic

Return the numeric id of a SERCOM device derived from its address.

Parameters
[in]sercomSERCOM device
Returns
numeric id of the given SERCOM device

Definition at line 93 of file periph_cpu.h.

Variable Documentation

◆ sam0_adc_pins

const gpio_t sam0_adc_pins[1][20]
static
Initial value:
= {
{
GPIO_PIN(PA, 2), GPIO_PIN(PA, 3), GPIO_PIN(PB, 8), GPIO_PIN(PB, 9),
GPIO_PIN(PA, 4), GPIO_PIN(PA, 5), GPIO_PIN(PA, 6), GPIO_PIN(PA, 7),
GPIO_PIN(PB, 0), GPIO_PIN(PB, 1), GPIO_PIN(PB, 2), GPIO_PIN(PB, 3),
GPIO_PIN(PB, 4), GPIO_PIN(PB, 5), GPIO_PIN(PB, 6), GPIO_PIN(PB, 7),
GPIO_PIN(PA, 8), GPIO_PIN(PA, 9), GPIO_PIN(PA, 10), GPIO_PIN(PA, 11),
}
}
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
PB
@ PB
port B
Definition periph_cpu_common.h:96
PA
@ PA
port A
Definition periph_cpu_common.h:95

Pins that can be used for ADC input.

Definition at line 101 of file periph_cpu.h.