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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014-2016 Freie Universität Berlin
3 * SPDX-FileCopyrightText: 2018 HAW Hamburg
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
22
23/*
24 * This board provides an LSE, so enable it before including the default clock config
25 */
26#ifndef CONFIG_BOARD_HAS_LSE
27#define CONFIG_BOARD_HAS_LSE 1
28#endif
29
30#include "periph_cpu.h"
31#include "clk_conf.h"
32#include "cfg_timer_tim2.h"
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
42static const uart_conf_t uart_config[] = {
43 {
44 .dev = USART1,
45 .rcc_mask = RCC_APB2ENR_USART1EN,
46 .rx_pin = GPIO_PIN(PORT_A, 10),
47 .tx_pin = GPIO_PIN(PORT_A, 9),
48 .rx_af = GPIO_AF7,
49 .tx_af = GPIO_AF7,
50 .bus = APB2,
51 .irqn = USART1_IRQn
52 },
53 {
54 .dev = USART2,
55 .rcc_mask = RCC_APB1ENR_USART2EN,
56 .rx_pin = GPIO_PIN(PORT_A, 3),
57 .tx_pin = GPIO_PIN(PORT_A, 2),
58 .rx_af = GPIO_AF7,
59 .tx_af = GPIO_AF7,
60 .bus = APB1,
61 .irqn = USART2_IRQn
62 }
63};
64
65#define UART_0_ISR (isr_usart1)
66#define UART_1_ISR (isr_usart2)
67
68#define UART_NUMOF ARRAY_SIZE(uart_config)
70
75#define PWM_NUMOF 0
77
82static const spi_conf_t spi_config[] = {
83 {
84 .dev = SPI1,
85 .mosi_pin = GPIO_PIN(PORT_A, 7),
86 .miso_pin = GPIO_PIN(PORT_A, 6),
87 .sclk_pin = GPIO_PIN(PORT_A, 5),
88 .cs_pin = GPIO_PIN(PORT_B, 0),
89 .mosi_af = GPIO_AF5,
90 .miso_af = GPIO_AF5,
91 .sclk_af = GPIO_AF5,
92 .cs_af = GPIO_AF5,
93 .rccmask = RCC_APB2ENR_SPI1EN,
94 .apbbus = APB2
95 },
96 {
97 .dev = SPI2,
98 .mosi_pin = GPIO_PIN(PORT_B, 14),
99 .miso_pin = GPIO_PIN(PORT_B, 15),
100 .sclk_pin = GPIO_PIN(PORT_B, 13),
101 .cs_pin = GPIO_PIN(PORT_B, 12),
102 .mosi_af = GPIO_AF5,
103 .miso_af = GPIO_AF5,
104 .sclk_af = GPIO_AF5,
105 .cs_af = GPIO_AF5,
106 .rccmask = RCC_APB1ENR_SPI2EN,
107 .apbbus = APB1
108 }
109};
110
111#define SPI_NUMOF ARRAY_SIZE(spi_config)
113
118static const i2c_conf_t i2c_config[] = {
119 {
120 .dev = I2C1,
121 .speed = I2C_SPEED_NORMAL,
122 .scl_pin = GPIO_PIN(PORT_B, 8),
123 .sda_pin = GPIO_PIN(PORT_B, 9),
124 .scl_af = GPIO_AF4,
125 .sda_af = GPIO_AF4,
126 .bus = APB1,
127 .rcc_mask = RCC_APB1ENR_I2C1EN,
128 .clk = CLOCK_APB1,
129 .irqn = I2C1_EV_IRQn
130 }
131};
132
133#define I2C_0_ISR isr_i2c1_ev
134
135#define I2C_NUMOF ARRAY_SIZE(i2c_config)
137
138#ifdef __cplusplus
139}
140#endif
141
@ PORT_B
port B
Definition periph_cpu.h:44
@ PORT_A
port A
Definition periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
I2C configuration structure.
Definition periph_cpu.h:295
SPI device configuration.
Definition periph_cpu.h:333
UART device configuration.
Definition periph_cpu.h:214