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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014-2015 Freie Universität Berlin
3 * SPDX-FileCopyrightText: 2016 UC Berkeley
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
22
23#include <stdint.h>
24
25#include "cpu.h"
26#include "periph_cpu.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
64#define CLOCK_USE_PLL (1)
65
66#if CLOCK_USE_PLL
67/* edit these values to adjust the PLL output frequency */
68#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
69#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
70/* generate the actual used core clock frequency */
71#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
72#elif CLOCK_USE_XOSC32_DFLL
73/* Settings for 32 kHz external oscillator and 48 MHz DFLL */
74#define CLOCK_CORECLOCK (48000000U)
75#define CLOCK_XOSC32K (32768UL)
76#define CLOCK_8MHZ (1)
77#define GEN2_ULP32K (1)
78#else
79/* edit this value to your needs */
80#define CLOCK_DIV (1U)
81/* generate the actual core clock frequency */
82#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
83#endif
85
90#ifndef RTT_FREQUENCY
91#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
92#endif
94
99static const tc32_conf_t timer_config[] = {
100 { /* Timer 0 - System Clock */
101 .dev = TC3,
102 .irq = TC3_IRQn,
103 .pm_mask = PM_APBCMASK_TC3,
104 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
105#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
106 .gclk_src = SAM0_GCLK_1MHZ,
107#else
108 .gclk_src = SAM0_GCLK_MAIN,
109#endif
110 .flags = TC_CTRLA_MODE_COUNT16,
111 },
112 { /* Timer 1 */
113 .dev = TC4,
114 .irq = TC4_IRQn,
115 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
116 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
117#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
118 .gclk_src = SAM0_GCLK_1MHZ,
119#else
120 .gclk_src = SAM0_GCLK_MAIN,
121#endif
122 .flags = TC_CTRLA_MODE_COUNT32,
123 }
124};
125
126#define TIMER_0_MAX_VALUE 0xffff
127
128/* interrupt function name mapping */
129#define TIMER_0_ISR isr_tc3
130#define TIMER_1_ISR isr_tc4
131
132#define TIMER_NUMOF ARRAY_SIZE(timer_config)
134
139
140/* ADC Default values */
141#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
142
143#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
144#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
145#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
146
147static const adc_conf_chan_t adc_channels[] = {
148 /* port, pin, muxpos */
149 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 },
150 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 },
151 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA08 },
152};
153
154#define ADC_NUMOF ARRAY_SIZE(adc_channels)
156
161#define PWM_0_EN 1
162#define PWM_1_EN 1
163
164#if PWM_0_EN
165/* PWM0 channels */
166static const pwm_conf_chan_t pwm_chan0_config[] = {
167 /* GPIO pin, MUX value, TCC channel */
168 {GPIO_PIN(PA, 6), GPIO_MUX_E, 0},
169 {GPIO_PIN(PA, 7), GPIO_MUX_E, 1},
170};
171#endif
172#if PWM_1_EN
173/* PWM1 channels */
174static const pwm_conf_chan_t pwm_chan1_config[] = {
175 /* GPIO pin, MUX value, TCC channel */
176 {GPIO_PIN(PA, 18), GPIO_MUX_F, 2},
177 {GPIO_PIN(PA, 19), GPIO_MUX_F, 3},
178};
179#endif
180
181/* PWM device configuration */
182static const pwm_conf_t pwm_config[] = {
183#if PWM_0_EN
184 {TCC_CONFIG(TCC1), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
185#endif
186#if PWM_1_EN
187 {TCC_CONFIG(TCC0), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
188#endif
189};
190
191/* number of devices that are actually defined */
192#define PWM_NUMOF ARRAY_SIZE(pwm_config)
194
199static const spi_conf_t spi_config[] = {
200 {
201 .dev = &SERCOM4->SPI,
202 .miso_pin = GPIO_PIN(PC, 19),
203 .mosi_pin = GPIO_PIN(PB, 30),
204 .clk_pin = GPIO_PIN(PC, 18),
205 .miso_mux = GPIO_MUX_F,
206 .mosi_mux = GPIO_MUX_F,
207 .clk_mux = GPIO_MUX_F,
208 .miso_pad = SPI_PAD_MISO_0,
209 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
210 .gclk_src = SAM0_GCLK_MAIN,
211#ifdef MODULE_PERIPH_DMA
212 .tx_trigger = SERCOM4_DMAC_ID_TX,
213 .rx_trigger = SERCOM4_DMAC_ID_RX,
214#endif
215 }
216};
217
218#define SPI_NUMOF ARRAY_SIZE(spi_config)
220
225static const i2c_conf_t i2c_config[] = {
226 {
227 .dev = &(SERCOM3->I2CM),
228 .speed = I2C_SPEED_FAST,
229 .scl_pin = GPIO_PIN(PA, 17),
230 .sda_pin = GPIO_PIN(PA, 16),
231 .mux = GPIO_MUX_D,
232 .gclk_src = SAM0_GCLK_MAIN,
233 .flags = I2C_FLAG_NONE
234 }
235};
236#define I2C_NUMOF ARRAY_SIZE(i2c_config)
238
243#define RANDOM_NUMOF (0U)
245
246#ifdef __cplusplus
247}
248#endif
249
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:82
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ PB
port B
@ PC
port C
@ PA
port A
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA08
Alias for PIN16.
Definition periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:125
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:124
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:298
PWM channel configuration data structure.
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.