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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2024 TU Dresden
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
20
21#include "periph_cpu.h"
22#include "cfg_clock_32_1.h"
23#include "cfg_rtt_default.h"
24#include "cfg_timer_default.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
34static const uart_conf_t uart_config[] = {
35 {
36 .dev = NRF_UARTE0,
37 .rx_pin = GPIO_PIN(1, 12),
38 .tx_pin = GPIO_PIN(1, 11),
39#ifdef MODULE_PERIPH_UART_HW_FC
40 .rts_pin = GPIO_UNDEF,
41 .cts_pin = GPIO_UNDEF,
42#endif
43 .irqn = UARTE0_UART0_IRQn,
44 },
45};
46
47#define UART_0_ISR (isr_uart0)
48
49#define UART_NUMOF ARRAY_SIZE(uart_config)
51
56static const spi_conf_t spi_config[] = {
57 {
58 .dev = NRF_SPIM0,
59 .sclk = GPIO_PIN(1, 13),
60 .mosi = GPIO_PIN(1, 15),
61 .miso = GPIO_PIN(1, 14),
62 },
63 {
64 .dev = NRF_SPIM1,
65 .sclk = GPIO_PIN(0, 21),
66 .mosi = GPIO_PIN(0, 20),
67 .miso = GPIO_PIN(0, 24),
68 }
69};
70
71#define SPI_NUMOF ARRAY_SIZE(spi_config)
73
78static const i2c_conf_t i2c_config[] = {
79 {
80 .dev = NRF_TWIM1,
81 .scl = GPIO_PIN(0, 5),
82 .sda = GPIO_PIN(0, 4),
83 .speed = I2C_SPEED_NORMAL
84 },
85#ifdef BOARD_SEEEDSTUDIO_XIAO_NRF52840_SENSE
86 { /* internal I2C bus for the IMU */
87 .dev = NRF_TWIM0,
88 .scl = GPIO_PIN(0, 27),
89 .sda = GPIO_PIN(0, 7),
90 .speed = I2C_SPEED_NORMAL
91 }
92#endif
93};
94
95#define I2C_NUMOF ARRAY_SIZE(i2c_config)
97
98#ifdef __cplusplus
99}
100#endif
101
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217