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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2016 Freie Universität Berlin
3 * SPDX-FileCopyrightText: 2016-2017 Inria
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
22
23#include "periph_cpu.h"
24#include "periph_conf_common.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
34static const uart_conf_t uart_config[] = {
35 {
36 .dev = &SERCOM5->USART,
37 .rx_pin = GPIO_PIN(PB,23), /* ARDUINO_PIN_13, RX Pin */
38 .tx_pin = GPIO_PIN(PB,22), /* ARDUINO_PIN_14, TX Pin */
39#ifdef MODULE_PERIPH_UART_HW_FC
40 .rts_pin = GPIO_UNDEF,
41 .cts_pin = GPIO_UNDEF,
42#endif
43 .mux = GPIO_MUX_D,
44 .rx_pad = UART_PAD_RX_3,
45 .tx_pad = UART_PAD_TX_2,
46 .flags = UART_FLAG_NONE,
47 .gclk_src = SAM0_GCLK_MAIN,
48 }
49};
50
51/* interrupt function name mapping */
52#define UART_0_ISR isr_sercom5
53
54#define UART_NUMOF ARRAY_SIZE(uart_config)
56
61static const spi_conf_t spi_config[] = {
62 {
63 .dev = &SERCOM1->SPI,
64 .miso_pin = GPIO_PIN(PA, 19), /* ARDUINO_PIN_8, SERCOM1-MISO */
65 .mosi_pin = GPIO_PIN(PA, 16), /* ARDUINO_PIN_10, SERCOM1-MOSI */
66 .clk_pin = GPIO_PIN(PA, 17), /* ARDUINO_PIN_9, SERCOM1-SCK */
67 .miso_mux = GPIO_MUX_C,
68 .mosi_mux = GPIO_MUX_C,
69 .clk_mux = GPIO_MUX_C,
70 .miso_pad = SPI_PAD_MISO_3,
71 .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
72 .gclk_src = SAM0_GCLK_MAIN,
73#ifdef MODULE_PERIPH_DMA
74 .tx_trigger = SERCOM1_DMAC_ID_TX,
75 .rx_trigger = SERCOM1_DMAC_ID_RX,
76#endif
77 },
78 {
79 .dev = &SERCOM2->SPI,
80 .miso_pin = GPIO_PIN(PA, 15),
81 .mosi_pin = GPIO_PIN(PA, 12),
82 .clk_pin = GPIO_PIN(PA, 13),
83 .miso_mux = GPIO_MUX_C,
84 .mosi_mux = GPIO_MUX_C,
85 .clk_mux = GPIO_MUX_C,
86 .miso_pad = SPI_PAD_MISO_3,
87 .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
88 .gclk_src = SAM0_GCLK_MAIN,
89#ifdef MODULE_PERIPH_DMA
90 .tx_trigger = SERCOM2_DMAC_ID_TX,
91 .rx_trigger = SERCOM2_DMAC_ID_RX,
92#endif
93 }
94};
95
96#define SPI_NUMOF ARRAY_SIZE(spi_config)
98
99#ifdef __cplusplus
100}
101#endif
102
Common configuration for clock, timer, pwm, adc, rtc and rtt peripherals for Arduino MKR boards.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ UART_PAD_RX_3
select pad 3
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ PB
port B
@ PA
port A
@ UART_PAD_TX_2
select pad 2
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217