Loading...
Searching...
No Matches
periph_conf.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Nicholas Jackson
3 * 2017 HAW Hamburg
4 * 2020 Locha Inc
5 *
6 * This file is subject to the terms and conditions of the GNU Lesser
7 * General Public License v2.1. See the file LICENSE in the top level
8 * directory for more details.
9 */
10
23#ifndef PERIPH_CONF_H
24#define PERIPH_CONF_H
25
26#include "periph_cpu.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
36/* the main clock is fixed to 48MHZ */
37#define CLOCK_CORECLOCK (48000000U)
48static const timer_conf_t timer_config[] = {
49 {
50 .cfg = GPT_CFG_16T,
51 .chn = 2,
52 },
53 {
54 .cfg = GPT_CFG_32T,
55 .chn = 1,
56 },
57 {
58 .cfg = GPT_CFG_16T,
59 .chn = 2,
60 },
61 {
62 .cfg = GPT_CFG_32T,
63 .chn = 1,
64 }
65};
66
67#define TIMER_NUMOF ARRAY_SIZE(timer_config)
83static const uart_conf_t uart_config[] = {
84 {
85 .regs = UART0,
86 .tx_pin = 3,
87 .rx_pin = 2,
88#ifdef MODULE_PERIPH_UART_HW_FC
89 .rts_pin = 18,
90 .cts_pin = 19,
91#endif
92 .intn = UART0_IRQN
93 },
94 {
95 .regs = UART1,
96 .tx_pin = 11,
97 .rx_pin = 12,
98#ifdef MODULE_PERIPH_UART_HW_FC
99 .rts_pin = 8,
100 .cts_pin = 9,
101#endif
102 .intn = UART1_IRQN
103 }
104};
105#define UART_NUMOF ARRAY_SIZE(uart_config)
112#define I2C_NUMOF (1)
113#define I2C_SCL_PIN (4)
114#define I2C_SDA_PIN (5)
117#ifdef __cplusplus
118}
119#endif
120
121#endif /* PERIPH_CONF_H */
#define GPT_CFG_32T
GPT register values.
@ UART0_IRQN
21 UART0 Rx and Tx
#define UART0
UART0 register bank.
#define UART1
UART1 register bank.
Timer device configuration.
Definition periph_cpu.h:264
uint_fast8_t cfg
timer config word
Definition periph_cpu.h:312
UART device configuration.
Definition periph_cpu.h:218
gpio_t tx_pin
pin used for TX
Definition periph_cpu.h:222