Toggle navigation
Documentation
The friendly Operating System for the Internet of Things
Loading...
Searching...
No Matches
VIC.h
1
/* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will
2
* This file is subject to the terms and conditions of the GNU Lesser
3
* General Public License v2.1. See the file LICENSE in the top level
4
* directory for more details.
5
*
6
*/
7
8
#ifndef VIC_H
9
#define VIC_H
10
11
#include <stdbool.h>
12
13
#ifdef __cplusplus
14
extern
"C"
{
15
#endif
16
22
#define I_Bit 0x80
23
#define F_Bit 0x40
24
25
#define SYS32Mode 0x1F
26
#define IRQ32Mode 0x12
27
#define FIQ32Mode 0x11
28
29
#define INTMode (FIQ32Mode | IRQ32Mode)
30
35
#define HIGHEST_PRIORITY 0x01
36
#define IRQP_RTIMER 1
/* FIQ_PRIORITY // TODO: investigate problems with rtimer and FIQ */
37
#define IRQP_TIMER1 1
38
#define IRQP_WATCHDOG 1
39
#define IRQP_CLOCK 3
40
#define IRQP_GPIO 4
41
#define IRQP_RTC 8
42
#define LOWEST_PRIORITY 0x0F
45
#define WDT_INT 0
46
#define SWI_INT 1
47
#define ARM_CORE0_INT 2
48
#define ARM_CORE1_INT 3
49
#define TIMER0_INT 4
50
#define TIMER1_INT 5
51
#define UART0_INT 6
52
#define UART1_INT 7
53
#define PWM0_1_INT 8
54
#define I2C0_INT 9
55
#define SPI0_INT 10
/* SPI and SSP0 share VIC slot */
56
#define SSP0_INT 10
57
#define SSP1_INT 11
58
#define PLL_INT 12
59
#define RTC_INT 13
60
#define EINT0_INT 14
61
#define EINT1_INT 15
62
#define EINT2_INT 16
63
#define EINT3_INT 17
64
#define ADC0_INT 18
65
#define I2C1_INT 19
66
#define BOD_INT 20
67
#define EMAC_INT 21
68
#define USB_INT 22
69
#define CAN_INT 23
70
#define MCI_INT 24
71
#define GPDMA_INT 25
72
#define TIMER2_INT 26
73
#define TIMER3_INT 27
74
#define UART2_INT 28
75
#define UART3_INT 29
76
#define I2C2_INT 30
77
#define I2S_INT 31
78
79
#define VECT_ADDR_INDEX 0x100
80
#define VECT_CNTL_INDEX 0x200
81
82
bool
cpu_install_irq(
int
IntNumber,
void
*HandlerAddr,
int
Priority);
83
84
#ifdef __cplusplus
85
}
86
#endif
87
89
#endif
/* VIC_H */
Generated on Sat Nov 23 2024 19:57:23 by
1.9.8