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cfg_uart_default.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Koen Zandberg <koen@bergzand.net>
3 * SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#include "periph_cpu.h"
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
30static const uart_conf_t uart_config[] = {
31 {
32 .dev = USART0,
33 .rcu_mask = RCU_APB2EN_USART0EN_Msk,
34 .rx_pin = GPIO_PIN(PORT_A, 10),
35 .tx_pin = GPIO_PIN(PORT_A, 9),
36 .bus = APB2,
37 .irqn = USART0_IRQn,
38 },
39};
40
41#define UART_0_IRQN USART0_IRQn
42
43#define UART_NUMOF ARRAY_SIZE(uart_config)
45
46#ifdef __cplusplus
47}
48#endif
49
@ PORT_A
port A
Definition periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
UART device configuration.
Definition periph_cpu.h:217