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cfg_timer_default.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Koen Zandberg <koen@bergzand.net>
3 * SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
4 * SPDX-License-Identifier: LGPL-2.1-only
5 */
6
7#pragma once
8
19
20#include "periph_cpu.h"
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
35static const timer_conf_t timer_config[] = {
36 {
37 .dev = TIMER0,
38 .max = 0x0000ffff,
39 .rcu_mask = RCU_APB2EN_TIMER0EN_Msk,
40 .bus = APB2,
41 .irqn = TIMER0_Channel_IRQn
42 },
43 {
44 .dev = TIMER1,
45 .max = 0x0000ffff,
46 .rcu_mask = RCU_APB1EN_TIMER1EN_Msk,
47 .bus = APB1,
48 .irqn = TIMER1_IRQn
49 },
50#if !defined(MODULE_PERIPH_PM)
51 {
52 .dev = TIMER2,
53 .max = 0x0000ffff,
54 .rcu_mask = RCU_APB1EN_TIMER2EN_Msk,
55 .bus = APB1,
56 .irqn = TIMER2_IRQn
57 },
58#if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \
59 defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \
60 defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \
61 defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6)
62 {
63 .dev = TIMER3,
64 .max = 0x0000ffff,
65 .rcu_mask = RCU_APB1EN_TIMER3EN_Msk,
66 .bus = APB1,
67 .irqn = TIMER3_IRQn
68 },
69 {
70 .dev = TIMER4,
71 .max = 0x0000ffff,
72 .rcu_mask = RCU_APB1EN_TIMER4EN_Msk,
73 .bus = APB1,
74 .irqn = TIMER4_IRQn
75 }
76#endif
77#endif /* !defined(MODULE_PERIPH_PWM) */
78};
79
80#define TIMER_0_IRQN TIMER0_Channel_IRQn
81#define TIMER_1_IRQN TIMER1_IRQn
82
83#if !defined(MODULE_PERIPH_PWM)
84#define TIMER_2_IRQN TIMER2_IRQn
85#if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \
86 defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \
87 defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \
88 defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6)
89#define TIMER_3_IRQN TIMER3_IRQn
90#define TIMER_4_IRQN TIMER4_IRQn
91#endif
92#endif /* !defined(MODULE_PERIPH_PWM) */
93
94#define TIMER_NUMOF ARRAY_SIZE(timer_config)
96
97#ifdef __cplusplus
98}
99#endif
100
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
Timer device configuration.
Definition periph_cpu.h:263