lm4f120/include/periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Rakendra Thapa raken.nosp@m.drat.nosp@m.hapa@.nosp@m.gmai.nosp@m.l.com
Marc Poulhiès dkm@k.nosp@m.atap.nosp@m.lop.n.nosp@m.et

Definition in file lm4f120/include/periph_cpu.h.

#include "cpu.h"
+ Include dependency graph for lm4f120/include/periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  spi_conf_t
 SPI module configuration options. More...
 

Macros

#define SPI_HWCS(x)   (UINT_MAX - 1)
 Override resolution options. More...
 
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE   1
 declare needed generic SPI functions
 
#define PERIPH_SPI_NEEDS_TRANSFER_REG   1
 
#define PERIPH_SPI_NEEDS_TRANSFER_REGS   1
 
#define PERIPH_SPI_NEEDS_INIT_CS   1
 

Enumerations

enum  {
  PORT_A = 0, PORT_B = 1, PORT_C = 2, PORT_D = 3,
  PORT_E = 4, PORT_F = 5
}
 Available ports on the LM4F120. More...
 
#define HAVE_GPIO_T
 Overwrite the default gpio_t type definition.
 
#define GPIO_PIN(x, y)   ((gpio_t)((x<<4) | y))
 
typedef uint32_t gpio_t
 
#define HAVE_GPIO_DIR_T
 Override values for pin direction configuration.
 
enum  gpio_dir_t { GPIO_DIR_IN = GPIO_DIR_MODE_IN, GPIO_DIR_OUT = GPIO_DIR_MODE_OUT }
 
#define HAVE_SPI_CLK_T   1
 Override SPI clock speed values.
 
enum  spi_clk_t {
  SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1), SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0), SPI_CLK_1MHZ = SPI_CLK_SEL(0, 0, 1), SPI_CLK_5MHZ = SPI_CLK_SEL(0, 0, 0),
  SPI_CLK_10MHZ = SPI_CLK_SEL(1, 0, 0), SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ = 1, SPI_CLK_1MHZ = 2,
  SPI_CLK_5MHZ = 3, SPI_CLK_10MHZ = 4, SPI_CLK_100KHZ = 100000, SPI_CLK_400KHZ = 400000,
  SPI_CLK_1MHZ = 1000000, SPI_CLK_4MHZ = 4000000, SPI_CLK_5MHZ = 5000000, SPI_CLK_10MHZ = 10000000,
  SPI_CLK_100KHZ = 100, SPI_CLK_400KHZ = 400, SPI_CLK_1MHZ = 1000, SPI_CLK_5MHZ = 5000,
  SPI_CLK_10MHZ = 10000, SPI_CLK_100KHZ = SPI_FREQUENCY_FREQUENCY_K125, SPI_CLK_400KHZ = SPI_FREQUENCY_FREQUENCY_K500, SPI_CLK_1MHZ = SPI_FREQUENCY_FREQUENCY_M1,
  SPI_CLK_5MHZ = SPI_FREQUENCY_FREQUENCY_M4, SPI_CLK_10MHZ = SPI_FREQUENCY_FREQUENCY_M8, SPI_CLK_100KHZ = 100000U, SPI_CLK_400KHZ = 400000U,
  SPI_CLK_1MHZ = 1000000U, SPI_CLK_5MHZ = 5000000U, SPI_CLK_10MHZ = 10000000U, SPI_CLK_100KHZ = (100000),
  SPI_CLK_400KHZ = (400000), SPI_CLK_1MHZ = (1000000), SPI_CLK_5MHZ = (5000000), SPI_CLK_10MHZ = (10000000),
  SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ, SPI_CLK_1MHZ, SPI_CLK_5MHZ,
  SPI_CLK_10MHZ
}
 
#define HAVE_SPI_MODE_T   1
 Override SPI mode settings.
 
enum  spi_mode_t {
  SPI_MODE_0 = SPI_MODE_SEL(0, 0), SPI_MODE_1 = SPI_MODE_SEL(0, 1), SPI_MODE_2 = SPI_MODE_SEL(1, 0), SPI_MODE_3 = SPI_MODE_SEL(1, 1),
  SPI_MODE_0 = 0, SPI_MODE_1 = (SSI_CR0_SPH), SPI_MODE_2 = (SSI_CR0_SPO), SPI_MODE_3 = (SSI_CR0_SPO | SSI_CR0_SPH),
  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0, SPI_MODE_1 = SSI_FRF_MOTO_MODE_1, SPI_MODE_2 = SSI_FRF_MOTO_MODE_2, SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
  SPI_MODE_0 = 0, SPI_MODE_1 = SPI_CONFIG_CPHA_Msk, SPI_MODE_2 = SPI_CONFIG_CPOL_Msk, SPI_MODE_3 = (SPI_CONFIG_CPOL_Msk | SPI_CONFIG_CPHA_Msk),
  SPI_MODE_0 = 0x0, SPI_MODE_1 = 0x1, SPI_MODE_2 = 0x2, SPI_MODE_3 = 0x3,
  SPI_MODE_0 = (SPI_CSR_NCPHA), SPI_MODE_1 = (0), SPI_MODE_2 = (SPI_CSR_CPOL | SPI_CSR_NCPHA), SPI_MODE_3 = (SPI_CSR_CPOL),
  SPI_MODE_0 = 0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3
}
 

Macro Definition Documentation

◆ SPI_HWCS

#define SPI_HWCS (   x)    (UINT_MAX - 1)

Override resolution options.

Override SPI hardware chip select macro

As of now, we do not support HW CS, so we always set it to a fixed value

Definition at line 114 of file lm4f120/include/periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the LM4F120.

Enumerator
PORT_A 

port A

PORT_B 

port B

PORT_C 

port C

PORT_D 

port D

PORT_E 

port E

PORT_F 

port F

Definition at line 85 of file lm4f120/include/periph_cpu.h.

◆ gpio_dir_t

enum gpio_dir_t
Enumerator
GPIO_DIR_IN 

configure pin as input

GPIO_DIR_OUT 

configure pin as output

Definition at line 62 of file lm4f120/include/periph_cpu.h.

◆ spi_clk_t

enum spi_clk_t
Enumerator
SPI_CLK_100KHZ 

16/128 -> 125KHz

SPI_CLK_400KHZ 

16/32 -> 500KHz

SPI_CLK_1MHZ 

16/16 -> 1MHz

SPI_CLK_5MHZ 

16/4 -> 4MHz

SPI_CLK_10MHZ 

16/2 -> 8MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_4MHZ 

drive the SPI bus with 4MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

Definition at line 150 of file lm4f120/include/periph_cpu.h.

◆ spi_mode_t

enum spi_mode_t
Enumerator
SPI_MODE_0 

mode 0

SPI_MODE_1 

mode 1

SPI_MODE_2 

mode 2

SPI_MODE_3 

mode 3

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

Definition at line 165 of file lm4f120/include/periph_cpu.h.