periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com>
3  * Copyright (C) 2017 Marc Poulhiès <dkm@kataplop.net>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_H
22 #define PERIPH_CPU_H
23 
24 
25 #include "cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 #define HAVE_GPIO_T
36 typedef uint32_t gpio_t;
37 #define GPIO_PIN(x,y) ((gpio_t)((x<<4) | y))
38 
40 #ifndef DOXYGEN
41 
45 #define HAVE_GPIO_MODE_T
46 typedef enum {
47  GPIO_IN = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD << 4)),
48  GPIO_IN_PD = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPD << 4)),
49  GPIO_IN_PU = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPU << 4)),
50  GPIO_OUT = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_STD << 4)),
51  GPIO_OD = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD << 4)),
52  GPIO_OD_PU = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD_WPU << 4)),
53 } gpio_mode_t;
55 #endif /* ndef DOXYGEN */
56 
61 #define HAVE_GPIO_DIR_T
62 typedef enum {
63  GPIO_DIR_IN = GPIO_DIR_MODE_IN,
64  GPIO_DIR_OUT = GPIO_DIR_MODE_OUT
65 } gpio_dir_t;
68 #ifndef DOXYGEN
69 
73 #define HAVE_GPIO_FLANK_T
74 typedef enum {
75  GPIO_FALLING = GPIO_FALLING_EDGE,
76  GPIO_RISING = GPIO_RISING_EDGE,
77  GPIO_BOTH = GPIO_BOTH_EDGES
78 } gpio_flank_t;
80 #endif /* ndef DOXYGEN */
81 
85 enum {
86  PORT_A = 0,
87  PORT_B = 1,
88  PORT_C = 2,
89  PORT_D = 3,
90  PORT_E = 4,
91  PORT_F = 5,
92 };
93 
97 #ifndef DOXYGEN
98 #define HAVE_ADC_RES_T
99 typedef enum {
100  ADC_RES_6BIT = 0xa00,
101  ADC_RES_8BIT = 0xb00,
102  ADC_RES_10BIT = ADC_RES_10BIT_S,
103  ADC_RES_12BIT = ADC_RES_12BIT_S,
104  ADC_RES_14BIT = 0xc00,
105  ADC_RES_16BIT = 0xd00,
106 } adc_res_t;
107 #endif /* ndef DOXYGEN */
108 
114 #define SPI_HWCS(x) (UINT_MAX - 1)
115 
120 typedef struct {
121  unsigned long ssi_sysctl;
122  unsigned long ssi_base;
123  unsigned long gpio_sysctl;
124  unsigned long gpio_port;
125  struct {
126  unsigned long clk;
127  unsigned long fss;
128  unsigned long rx;
129  unsigned long tx;
130  unsigned long mask;
131  } pins;
132 } spi_conf_t;
139 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE 1
140 #define PERIPH_SPI_NEEDS_TRANSFER_REG 1
141 #define PERIPH_SPI_NEEDS_TRANSFER_REGS 1
142 #define PERIPH_SPI_NEEDS_INIT_CS 1
143 
145 #ifndef DOXYGEN
146 
150 #define HAVE_SPI_CLK_T 1
151 typedef enum {
152  SPI_CLK_100KHZ = 100000,
153  SPI_CLK_400KHZ = 400000,
154  SPI_CLK_1MHZ = 1000000,
155  SPI_CLK_4MHZ = 4000000,
156  SPI_CLK_5MHZ = 5000000,
157  SPI_CLK_10MHZ = 10000000,
158 } spi_clk_t;
165 #define HAVE_SPI_MODE_T 1
166 typedef enum {
167  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0,
168  SPI_MODE_1 = SSI_FRF_MOTO_MODE_1,
169  SPI_MODE_2 = SSI_FRF_MOTO_MODE_2,
170  SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
171 } spi_mode_t;
173 #endif /* ndef DOXYGEN */
174 
175 #ifdef __cplusplus
176 }
177 #endif
178 
179 #endif /* PERIPH_CPU_H */
180 
port C
Definition: periph_cpu.h:38
CPOL=0, CPHA=1.
Definition: spi.h:159
configure as output in push-pull mode
Definition: gpio.h:117
unsigned long mask
Pin mask.
Definition: periph_cpu.h:130
unsigned long gpio_sysctl
GPIO device in sysctl.
Definition: periph_cpu.h:123
emit interrupt on rising flank
Definition: gpio.h:131
unsigned long clk
pin used for SCK
Definition: periph_cpu.h:126
ADC resolution: 12 bit.
Definition: adc.h:96
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:92
CPOL=0, CPHA=0.
Definition: spi.h:158
drive the SPI bus with 100KHz
Definition: spi.h:174
unsigned long ssi_sysctl
SSI device in sysctl.
Definition: periph_cpu.h:121
drive the SPI bus with 400KHz
Definition: spi.h:175
gpio_dir_t
Definition: periph_cpu.h:62
unsigned long ssi_base
SSI base address.
Definition: periph_cpu.h:122
emit interrupt on both flanks
Definition: gpio.h:132
port F
Definition: periph_cpu.h:41
gpio_flank_t
Definition of possible active flanks for external interrupt mode.
Definition: gpio.h:129
spi_mode_t
Available SPI modes, defining the configuration of clock polarity and clock phase.
Definition: spi.h:157
ADC resolution: 14 bit.
Definition: adc.h:97
configure pin as output
Definition: periph_cpu.h:64
ADC resolution: 10 bit.
Definition: adc.h:95
spi_clk_t
Available SPI clock speeds.
Definition: spi.h:173
CPOL=1, CPHA=1.
Definition: spi.h:161
port E
Definition: periph_cpu.h:40
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:86
port D
Definition: periph_cpu.h:39
ADC resolution: 16 bit.
Definition: adc.h:98
unsigned long fss
pin used for FSS
Definition: periph_cpu.h:127
configure pin as input
Definition: periph_cpu.h:63
drive the SPI bus with 5MHz
Definition: spi.h:177
port A
Definition: periph_cpu.h:36
unsigned long gpio_port
GPIO port.
Definition: periph_cpu.h:124
ADC resolution: 8 bit.
Definition: adc.h:94
ADC resolution: 6 bit.
Definition: adc.h:93
drive the SPI bus with 10MHz
Definition: spi.h:178
emit interrupt on falling flank
Definition: gpio.h:130
drive the SPI bus with 1MHz
Definition: spi.h:176
configure as input with pull-up resistor
Definition: gpio.h:116
gpio_mode_t
Available pin modes.
Definition: gpio.h:113
configure as input without pull resistor
Definition: gpio.h:114
unsigned long rx
pin used for MISO
Definition: periph_cpu.h:128
unsigned long tx
pin used for MOSI
Definition: periph_cpu.h:129
configure as output in open-drain mode without pull resistor
Definition: gpio.h:118
CPOL=1, CPHA=0.
Definition: spi.h:160
SPI configuration structure type.
Definition: periph_cpu.h:271
configure as input with pull-down resistor
Definition: gpio.h:115
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:120
port B
Definition: periph_cpu.h:37