lm4f120/include/periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com>
3  * Copyright (C) 2017 Marc Poulhiès <dkm@kataplop.net>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_H
22 #define PERIPH_CPU_H
23 
24 #include "cpu_conf.h"
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define HAVE_GPIO_T
34 typedef uint32_t gpio_t;
35 #define GPIO_PIN(x,y) ((gpio_t)((x<<4) | y))
36 
38 #ifndef DOXYGEN
39 
43 #define HAVE_GPIO_MODE_T
44 typedef enum {
45  GPIO_IN = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD << 4)),
46  GPIO_IN_PD = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPD << 4)),
47  GPIO_IN_PU = (GPIO_DIR_MODE_IN | (GPIO_PIN_TYPE_STD_WPU << 4)),
48  GPIO_OUT = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_STD << 4)),
49  GPIO_OD = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD << 4)),
50  GPIO_OD_PU = (GPIO_DIR_MODE_OUT | (GPIO_PIN_TYPE_OD_WPU << 4)),
51 } gpio_mode_t;
53 #endif /* ndef DOXYGEN */
54 
59 #define HAVE_GPIO_DIR_T
60 typedef enum {
61  GPIO_DIR_IN = GPIO_DIR_MODE_IN,
62  GPIO_DIR_OUT = GPIO_DIR_MODE_OUT
63 } gpio_dir_t;
66 #ifndef DOXYGEN
67 
71 #define HAVE_GPIO_FLANK_T
72 typedef enum {
73  GPIO_FALLING = GPIO_FALLING_EDGE,
74  GPIO_RISING = GPIO_RISING_EDGE,
75  GPIO_BOTH = GPIO_BOTH_EDGES
76 } gpio_flank_t;
78 #endif /* ndef DOXYGEN */
79 
83 enum {
84  PORT_A = 0,
85  PORT_B = 1,
86  PORT_C = 2,
87  PORT_D = 3,
88  PORT_E = 4,
89  PORT_F = 5,
90 };
91 
95 #ifndef DOXYGEN
96 #define HAVE_ADC_RES_T
97 typedef enum {
98  ADC_RES_6BIT = 0xa00,
99  ADC_RES_8BIT = 0xb00,
100  ADC_RES_10BIT = ADC_RES_10BIT_S,
101  ADC_RES_12BIT = ADC_RES_12BIT_S,
102  ADC_RES_14BIT = 0xc00,
103  ADC_RES_16BIT = 0xd00,
104 } adc_res_t;
105 #endif /* ndef DOXYGEN */
106 
112 #define SPI_HWCS(x) (UINT_MAX - 1)
113 
118 typedef struct {
119  unsigned long ssi_sysctl;
120  unsigned long ssi_base;
121  unsigned long gpio_sysctl;
122  unsigned long gpio_port;
123  struct {
124  unsigned long clk;
125  unsigned long fss;
126  unsigned long rx;
127  unsigned long tx;
128  unsigned long mask;
129  } pins;
130 } spi_conf_t;
137 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE 1
138 #define PERIPH_SPI_NEEDS_TRANSFER_REG 1
139 #define PERIPH_SPI_NEEDS_TRANSFER_REGS 1
140 #define PERIPH_SPI_NEEDS_INIT_CS 1
141 
147 #define HAVE_SPI_CLK_T 1
148 typedef enum {
149  SPI_CLK_100KHZ = 100000,
150  SPI_CLK_400KHZ = 400000,
151  SPI_CLK_1MHZ = 1000000,
152  SPI_CLK_4MHZ = 4000000,
153  SPI_CLK_5MHZ = 5000000,
154  SPI_CLK_10MHZ = 10000000,
155 } spi_clk_t;
162 #define HAVE_SPI_MODE_T 1
163 typedef enum {
164  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0,
165  SPI_MODE_1 = SSI_FRF_MOTO_MODE_1,
166  SPI_MODE_2 = SSI_FRF_MOTO_MODE_2,
167  SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
168 } spi_mode_t;
171 #ifdef __cplusplus
172 }
173 #endif
174 
175 #endif /* PERIPH_CPU_H */
176 
CPOL=0, CPHA=1.
Implementation specific CPU configuration options.
unsigned long mask
Pin mask.
unsigned long gpio_sysctl
GPIO device in sysctl.
emit interrupt on rising flank
Definition: gpio.h:114
unsigned long clk
pin used for SCK
ADC resolution: 12 bit.
CPOL=0, CPHA=0.
drive the SPI bus with 100KHz
unsigned long ssi_sysctl
SSI device in sysctl.
drive the SPI bus with 400KHz
drive the SPI bus with 4MHz
unsigned long ssi_base
SSI base address.
emit interrupt on both flanks
Definition: gpio.h:115
gpio_flank_t
Definition of possible active flanks for external interrupt mode.
Definition: gpio.h:112
not supported by hardware
configure pin as output
ADC resolution: 10 bit.
CPOL=1, CPHA=1.
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:69
not supported by hardware
unsigned long fss
pin used for FSS
configure pin as input
drive the SPI bus with 5MHz
unsigned long gpio_port
GPIO port.
not supported by hardware
not supported by hardware
drive the SPI bus with 10MHz
emit interrupt on falling flank
Definition: gpio.h:113
drive the SPI bus with 1MHz
input, no pull
unsigned long rx
pin used for MISO
unsigned long tx
pin used for MOSI
not supported
CPOL=1, CPHA=0.
SPI module configuration options.
input, pull-down