Loading...
Searching...
No Matches
timer_conf_t Struct Reference

Timer device configuration. More...

Detailed Description

Timer device configuration.

Timer configuration data.

Configuration type of a timer device timer_conf_t::dev, having timer_conf_t::ch_numof number of channels, each one modeled as timer_channel_conf_t.

Timer configuration options.

Timer configuration on an MSP430 timer.

Override resolution options.

Timer configuration.

All timers can be derived from TC0_t struct. Need check at runtime the type and number of channels to perform all operations.

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e. if multiple timers are enabled.

Define timer configuration values

Definition at line 264 of file periph_cpu.h.

#include <periph_cpu.h>

Data Fields

TC0_t * dev
 Pointer to the used as Timer device.
 
pwr_reduction_t pwr
 Power Management.
 
timer_type_t type
 Timer Type.
 
cpu_int_lvl_t int_lvl [TIMER_CH_MAX_NUMOF]
 Interrupt channels level.
 
uint_fast8_t chn
 number of channels
 
uint_fast8_t cfg
 timer config word
 
timer_dev_t prescaler
 the lower neighboring timer (not initialized for LETIMER)
 
timer_dev_t timer
 the higher numbered timer
 
IRQn_Type irq
 number of the higher timer IRQ channel
 
uint8_t channel_numof
 number of channels per timer
 
TIMER_Type * dev
 timer device
 
uint32_t max
 maximum value to count to (16/32 bit)
 
uint32_t rcu_mask
 corresponding bit in the RCC register
 
uint8_t bus
 APBx bus the timer is clock from.
 
uint8_t irqn
 global IRQ channel
 
uint32_t dev
 Address of timer base.
 
int irqn
 Number of the higher timer IRQ channel.
 
uint32_t sysctl
 Address of timer system control.
 
uint32_t intbase
 Interrupt base of timer.
 
int channels
 Number of channels for the timer.
 
msp430_timer_ttimer
 Hardware timer to use.
 
REG16 * irq_flags
 "Timer interrupt vector" register
 
msp430_timer_clock_source_t clock_source
 Clock source to use.
 
NRF_TIMER_Type * dev
 timer device
 
uint8_t channels
 number of hardware channels minus one
 
uint8_t bitmode
 counter width
 
const timer_channel_conf_tch
 pointer to timer channel configuration
 
uint8_t ch_numof
 number of timer channels
 
Tc * dev
 timer device
 
uint8_t id_ch0
 ID of the timer's first channel.
 
TIM_TypeDef * dev
 timer device
 
uint32_t rcc_mask
 corresponding bit in the RCC register
 

Field Documentation

◆ bitmode

uint8_t timer_conf_t::bitmode

counter width

Definition at line 308 of file periph_cpu_common.h.

◆ bus

uint8_t timer_conf_t::bus

APBx bus the timer is clock from.

Definition at line 323 of file periph_cpu.h.

◆ cfg

uint_fast8_t timer_conf_t::cfg

timer config word

Definition at line 312 of file periph_cpu.h.

◆ ch

const timer_channel_conf_t* timer_conf_t::ch

pointer to timer channel configuration

Definition at line 459 of file periph_cpu.h.

◆ ch_numof

uint8_t timer_conf_t::ch_numof

number of timer channels

Definition at line 460 of file periph_cpu.h.

◆ channel_numof

uint8_t timer_conf_t::channel_numof

number of channels per timer

number of channels, 0 is alias for TIMER_CHANNEL_NUMOF

Definition at line 560 of file periph_cpu.h.

◆ channels [1/2]

int timer_conf_t::channels

Number of channels for the timer.

Definition at line 117 of file periph_cpu.h.

◆ channels [2/2]

uint8_t timer_conf_t::channels

number of hardware channels minus one

The last hardware channels is implicitly used by timer_read() and not available to the user. This value, hence, is the number of channels available to the user.

Definition at line 307 of file periph_cpu_common.h.

◆ chn

uint_fast8_t timer_conf_t::chn

number of channels

Definition at line 311 of file periph_cpu.h.

◆ clock_source

msp430_timer_clock_source_t timer_conf_t::clock_source

Clock source to use.

Definition at line 326 of file periph_cpu_common.h.

◆ dev [1/6]

TIMER_Type * timer_conf_t::dev

Pointer to the used as Timer device.

pointer to timer base address

Definition at line 265 of file periph_cpu.h.

◆ dev [2/6]

TIMER_Type* timer_conf_t::dev

timer device

pointer to timer base address

Definition at line 320 of file periph_cpu.h.

◆ dev [3/6]

uint32_t timer_conf_t::dev

Address of timer base.

Definition at line 112 of file periph_cpu.h.

◆ dev [4/6]

NRF_TIMER_Type* timer_conf_t::dev

timer device

Definition at line 299 of file periph_cpu_common.h.

◆ dev [5/6]

Tc* timer_conf_t::dev

timer device

Definition at line 199 of file periph_cpu.h.

◆ dev [6/6]

TIM_TypeDef* timer_conf_t::dev

timer device

Definition at line 51 of file cpu_timer.h.

◆ id_ch0

uint8_t timer_conf_t::id_ch0

ID of the timer's first channel.

Definition at line 200 of file periph_cpu.h.

◆ int_lvl

cpu_int_lvl_t timer_conf_t::int_lvl[TIMER_CH_MAX_NUMOF]

Interrupt channels level.

Definition at line 268 of file periph_cpu.h.

◆ intbase

uint32_t timer_conf_t::intbase

Interrupt base of timer.

Definition at line 116 of file periph_cpu.h.

◆ irq

IRQn_Type timer_conf_t::irq

number of the higher timer IRQ channel

Definition at line 559 of file periph_cpu.h.

◆ irq_flags

REG16* timer_conf_t::irq_flags

"Timer interrupt vector" register

Use &TIMER_A_IRQFLAGS for TIMER_A or &TIMER_B_IRQFLAGS for TIMER_B.

Definition at line 325 of file periph_cpu_common.h.

◆ irqn [1/2]

uint8_t timer_conf_t::irqn

global IRQ channel

IRQ number of the timer device.

Definition at line 324 of file periph_cpu.h.

◆ irqn [2/2]

int timer_conf_t::irqn

Number of the higher timer IRQ channel.

Definition at line 114 of file periph_cpu.h.

◆ max

uint32_t timer_conf_t::max

maximum value to count to (16/32 bit)

Max tick value of timer.

Definition at line 321 of file periph_cpu.h.

◆ prescaler

timer_dev_t timer_conf_t::prescaler

the lower neighboring timer (not initialized for LETIMER)

Definition at line 557 of file periph_cpu.h.

◆ pwr

pwr_reduction_t timer_conf_t::pwr

Power Management.

Definition at line 266 of file periph_cpu.h.

◆ rcc_mask

uint32_t timer_conf_t::rcc_mask

corresponding bit in the RCC register

Definition at line 53 of file cpu_timer.h.

◆ rcu_mask

uint32_t timer_conf_t::rcu_mask

corresponding bit in the RCC register

Definition at line 322 of file periph_cpu.h.

◆ sysctl

uint32_t timer_conf_t::sysctl

Address of timer system control.

Definition at line 115 of file periph_cpu.h.

◆ timer [1/2]

timer_dev_t timer_conf_t::timer

the higher numbered timer

Definition at line 558 of file periph_cpu.h.

◆ timer [2/2]

msp430_timer_t* timer_conf_t::timer

Hardware timer to use.

Definition at line 318 of file periph_cpu_common.h.

◆ type

timer_type_t timer_conf_t::type

Timer Type.

Definition at line 267 of file periph_cpu.h.


The documentation for this struct was generated from the following files: