timer_conf_t Struct Reference

Timer configuration data. More...

Detailed Description

Timer configuration.

Define timer configuration values.

Timer configuration options.

The two timers must be adjacent to each other (e.g. TIMER0 and TIMER1, or TIMER2 and TIMER3, etc.).

Definition at line 144 of file cc2538/include/periph_cpu.h.

#include </tmp/RIOT/cpu/cc2538/include/periph_cpu.h>

Data Fields

 timer device
uint_fast8_t channels
 number of channels
uint_fast8_t cfg
 timer config word
 the GPT base address
uint8_t num
 number of the timer
uint8_t irqn
 interrupt number More...
TIMER_TypeDef * prescaler
 the lower numbered neighboring timer
TIMER_TypeDef * timer
 the higher numbered timer
uint8_t pre_cmu
 prescale timer bit in CMU register, the timer bit is deducted from this
NRF_TIMER_Type * dev
 timer device
uint8_t channels
 number of channels available
uint8_t bitmode
 counter width
Tc * dev
 timer device
uint8_t id_ch0
 ID of the timer's first channel.
TIM_TypeDef * dev
 timer device
uint32_t max
 maximum value to count to (16/32 bit)
uint32_t rcc_mask
 corresponding bit in the RCC register
uint8_t bus
 APBx bus the timer is clock from.

Field Documentation

◆ irqn

uint8_t timer_conf_t::irqn

global IRQ channel

IRQ number of the timer device.

number of the higher timer IRQ channel

Definition at line 68 of file cc26x0/include/periph_cpu.h.

The documentation for this struct was generated from the following files: