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cc26xx_cc13xx_ccfg.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Leon George
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
16#ifndef CC26XX_CC13XX_CCFG_H
17#define CC26XX_CC13XX_CCFG_H
18
19#include <cc26xx_cc13xx.h>
20
21#ifdef __cplusplus
22extern "C" {
23#endif
24
52
57#define CCFG_EXT_LF_CLK_DIO_m 0xFF000000
58#define CCFG_EXT_LF_CLK_DIO_s 24
59#define CCFG_EXT_LF_CLK_RTC_INCREMENT_m 0x00FFFFFF
60#define CCFG_EXT_LF_CLK_RTC_INCREMENT_s 0
61#define CCFG_MODE_CONF_1_TCXO_TYPE_m 0x80000000
62#define CCFG_MODE_CONF_1_TCXO_TYPE_s 31
63#define CCFG_MODE_CONF_1_TCXO_MAX_START_m 0x7F000000
64#define CCFG_MODE_CONF_1_TCXO_MAX_START_s 24
65#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_m 0x00F00000
66#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_s 20
67#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_m 0x00080000
68#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_s 19
69#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_m 0x00070000
70#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_s 16
71#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_m 0x0000F000
72#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_s 12
73#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_m 0x00000F00
74#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_s 8
75#define CCFG_MODE_CONF_1_XOSC_MAX_START_m 0x000000FF
76#define CCFG_MODE_CONF_1_XOSC_MAX_START_s 0
77#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_m 0xFFFF0000
78#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_s 16
79#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_m 0x0000FFF0
80#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_s 4
81#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_m 0x00000008
82#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_s 3
83#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_m 0x00000004
84#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_s 2
85#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x00000002
86#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_m 0x00000002
87#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_s 1
88#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_m 0x00000001
89#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_s 0
90#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_m 0xF0000000
91#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_s 28
92#define CCFG_MODE_CONF_DCDC_RECHARGE_m 0x08000000
93#define CCFG_MODE_CONF_DCDC_RECHARGE_s 27
94#define CCFG_MODE_CONF_DCDC_ACTIVE_m 0x04000000
95#define CCFG_MODE_CONF_DCDC_ACTIVE_s 26
96#define CCFG_MODE_CONF_VDDR_EXT_LOAD 0x02000000
97#define CCFG_MODE_CONF_VDDR_EXT_LOAD_m 0x02000000
98#define CCFG_MODE_CONF_VDDR_EXT_LOAD_s 25
99#define CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x01000000
100#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_m 0x01000000
101#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_s 24
102#define CCFG_MODE_CONF_SCLK_LF_OPTION_m 0x00C00000
103#define CCFG_MODE_CONF_SCLK_LF_OPTION_s 22
104#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_m 0x00200000
105#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_s 21
106#define CCFG_MODE_CONF_RTC_COMP_m 0x00100000
107#define CCFG_MODE_CONF_RTC_COMP_s 20
108#define CCFG_MODE_CONF_XOSC_FREQ_m 0x000C0000
109#define CCFG_MODE_CONF_XOSC_FREQ_s 18
110#define CCFG_MODE_CONF_XOSC_CAP_MOD_m 0x00020000
111#define CCFG_MODE_CONF_XOSC_CAP_MOD_s 17
112#define CCFG_MODE_CONF_HF_COMP_m 0x00010000
113#define CCFG_MODE_CONF_HF_COMP_s 16
114#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_m 0x0000FF00
115#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_s 8
116#define CCFG_MODE_CONF_VDDR_CAP_m 0x000000FF
117#define CCFG_MODE_CONF_VDDR_CAP_s 0
118#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_m 0xFF000000
119#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_s 24
120#define CCFG_BL_CONFIG_BL_LEVEL_m 0x00010000
121#define CCFG_BL_CONFIG_BL_LEVEL_s 16
122#define CCFG_BL_CONFIG_BL_PIN_NUMBER_m 0x0000FF00
123#define CCFG_BL_CONFIG_BL_PIN_NUMBER_s 8
124#define CCFG_BL_CONFIG_BL_ENABLE_m 0x000000FF
125#define CCFG_BL_CONFIG_BL_ENABLE_s 0
126#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_m 0x00000100
127#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_s 8
128#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_m 0x00000001
129#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_s 0
130#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_m 0x000000FF
131#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_s 0
132#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_m 0x00FF0000
133#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_s 16
134#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_m 0x0000FF00
135#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_s 8
136#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_m 0x000000FF
137#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_s 0
147#define CCFG_BASE (0x50003000)
150#ifdef CPU_VARIANT_X0
154#define CCFG ((ccfg_regs_t *) (CCFG_BASE + 0xFA8))
155#else
159#define CCFG ((ccfg_regs_t *) (CCFG_BASE + 0x1FA8))
160#endif
161
162#ifdef __cplusplus
163} /* end extern "C" */
164#endif
165
166#endif /* CC26XX_CC13XX_CCFG_H */
167
CC26xx, CC13xx definitions.
volatile uint32_t reg32_t
Unsigned 32-bit register type.
CCFG registers.
reg32_t IEEE_MAC_0
IEEE MAC address 0.
reg32_t CCFG_TAP_DAP_1
test access points enable 1
reg32_t VOLT_LOAD_1
voltage load 1
reg32_t SIZE_AND_DIS_FLAGS
CCFG size and disable flags.
reg32_t IMAGE_VALID_CONF
image valid
reg32_t RTC_OFFSET
RTC offset.
reg32_t IEEE_MAC_1
IEEE MAC address 1.
reg32_t EXT_LF_CLK
extern LF clock config
reg32_t IEEE_BLE_1
IEEE BLE address 1.
reg32_t BL_CONFIG
bootloader config
reg32_t CCFG_PROT_127_96
protect sectors 96-127
reg32_t VOLT_LOAD_0
voltage load 0
reg32_t CCFG_TI_OPTIONS
TI options.
reg32_t MODE_CONF
mmode config 0
reg32_t CCFG_PROT_63_32
protect sectors 32-63
reg32_t FREQ_OFFSET
frequency offset
reg32_t IEEE_BLE_0
IEEE BLE address 0.
reg32_t CCFG_PROT_31_0
protect sectors 0-31
reg32_t CCFG_PROT_95_64
protect sectors 64-95
reg32_t CCFG_TAP_DAP_0
test access points enable 0
reg32_t ERASE_CONF
erase config
reg32_t MODE_CONF_1
mode config 1