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cpu_conf.h
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1/*
2 * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
19#include "vendor/gd32vf103_core.h"
20#include "cpu_conf_common.h"
21
22#ifndef CPU_CONF_H
23#define CPU_CONF_H
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#define CLIC_NUM_INTERRUPTS (ECLIC_NUM_INTERRUPTS)
30#define CLIC_BASE_ADDR (ECLIC_CTRL_ADDR)
31#define CPU_DEFAULT_IRQ_PRIO (0xFF)
32
36#define HAVE_CSR_MIE (0)
37
42#define FLASHPAGE_SIZE (1024U)
43#define FLASHPAGE_NUMOF (128U)
44#define FLASHPAGE_WRITE_BLOCK_SIZE (2U)
45#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
46#define CPU_FLASH_BASE 0x08000000
52typedef enum {
60 SWJ_CFG_NO_NJTRST = 1U << AFIO_PCF0_SWJ_CFG_Pos,
64 SWJ_CFG_NO_JTAG = 4U << AFIO_PCF0_SWJ_CFG_Pos,
66
67#ifndef CONFIG_AFIO_PCF0_SWJ_CFG
74#define CONFIG_AFIO_PCF0_SWJ_CFG SWJ_CFG_NO_NJTRST
75#endif
76
77#ifdef __cplusplus
78}
79#endif
80
81#endif /* CPU_CONF_H */
afio_pcf0_swj_cfg_t
Possible values of the SWJ_CFG field in the AFIO->PCF0 register.
Definition cpu_conf.h:52
@ SWJ_CFG_NO_NJTRST
JTAG enabled, but NJTRST disabled and pin PB4 usable as GPIO.
Definition cpu_conf.h:60
@ SWJ_CFG_FULL_JTAG
Full JTAG interface (reset value)
Definition cpu_conf.h:56
@ SWJ_CFG_NO_JTAG
JTAG disabled, all debug pins usable as GPIOs.
Definition cpu_conf.h:64