34#define PERIPH_I2C_NEED_READ_REG 
   36#define PERIPH_I2C_NEED_WRITE_REG 
   38#define PERIPH_I2C_NEED_READ_REGS 
   39#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \ 
   40    defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32F4) || \ 
   41    defined(CPU_FAM_STM32MP1) 
   43#define PERIPH_I2C_NEED_WRITE_REGS 
   52#define HAVE_I2C_SPEED_T 
   54#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \ 
   55    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \ 
   56    defined(CPU_FAM_STM32MP1) 
   61#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \ 
   62    defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ 
   63    defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \ 
   64    defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \ 
   65    defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \ 
   66    defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0) 
   81#ifndef CPU_FAM_STM32F1 
   87#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \ 
   88    defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \ 
   89    defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L4) || \ 
   90    defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32WB) || \ 
   91    defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WL) || \ 
   92    defined(CPU_FAM_STM32C0) 
   95#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \ 
   96    defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \ 
   97    defined(CPU_FAM_STM32MP1) 
  103#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \ 
  104    defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \ 
  105    defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \ 
  106    defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) || \ 
  107    defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \ 
  108    defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0) 
  133static const i2c_timing_param_t timing_params[] = {
 
  161#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \ 
  162    defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \ 
  163    defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L0) || \ 
  164    defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \ 
  165    defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \ 
  166    defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0) 
  171#define PERIPH_I2C_MAX_BYTES_PER_FRAME  (256U) 
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
GPIO CPU definitions for the STM32 family.
gpio_af_t
Override alternative GPIO mode options.
I2C configuration structure.
gpio_af_t scl_af
scl pin alternate function value
gpio_af_t sda_af
sda pin alternate function value
IRQn_Type irqn
I2C event interrupt number.
uint32_t rcc_mask
bit in clock enable register