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cc26xx_cc13xx_adi.h
Go to the documentation of this file.
1
/*
2
* Copyright (C) 2020 Locha Inc
3
*
4
* This file is subject to the terms and conditions of the GNU Lesser
5
* General Public License v2.1. See the file LICENSE in the top level
6
* directory for more details.
7
*/
8
19
#ifndef CC26XX_CC13XX_ADI_H
20
#define CC26XX_CC13XX_ADI_H
21
22
#include "
cc26xx_cc13xx.h
"
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24
#ifdef __cplusplus
25
extern
"C"
{
26
#endif
27
31
typedef
struct
{
32
reg8_t
__reserved1
;
33
reg8_t
ATESTCTL1
;
34
reg8_t
REFSYSCTL0
;
35
reg8_t
REFSYSCTL1
;
36
reg8_t
REFSYSCTL2
;
37
reg8_t
REFSYSCTL3
;
38
reg8_t
DCDCCTL0
;
39
reg8_t
DCDCCTL1
;
40
reg8_t
DCDCCTL2
;
41
reg8_t
DCDCCTL3
;
42
reg8_t
DCDCCTL4
;
43
reg8_t
DCDCCTL5
;
44
#ifdef CPU_VARIANT_X2
45
reg8_t
AUX_DEBUG;
46
reg8_t
CTL_RECHARGE_CMP0;
47
reg8_t
CTL_RECHARGE_CMP1;
48
#endif
49
}
adi_3_refsys_regs_t
;
31
typedef
struct
{
…
};
50
54
typedef
struct
{
55
reg8_m4_t
__reserved1
;
56
reg8_m4_t
ATESTCTL1
;
57
reg8_m4_t
REFSYSCTL0
;
58
reg8_m4_t
REFSYSCTL1
;
59
reg8_m4_t
REFSYSCTL2
;
60
reg8_m4_t
REFSYSCTL3
;
61
reg8_m4_t
DCDCCTL0
;
62
reg8_m4_t
DCDCCTL1
;
63
reg8_m4_t
DCDCCTL2
;
64
reg8_m4_t
DCDCCTL3
;
65
reg8_m4_t
DCDCCTL4
;
66
reg8_m4_t
DCDCCTL5
;
67
#ifdef CPU_VARIANT_X2
68
reg8_m4_t
AUX_DEBUG;
69
reg8_m4_t
CTL_RECHARGE_CMP0;
70
reg8_m4_t
CTL_RECHARGE_CMP1;
71
#endif
72
}
adi_3_refsys_regs_m4_t
;
54
typedef
struct
{
…
};
73
78
#define ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST 0x00000002
79
#define ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN 0x00000040
89
#define ADI_3_REFSYS_BASE (PERIPH_BASE + 0x86200)
93
#define ADI_3_REFSYS_BASE_SET (ADI_3_REFSYS_BASE + ADI_SET)
97
#define ADI_3_REFSYS_BASE_CLR (ADI_3_REFSYS_BASE + ADI_CLR)
101
#define ADI_3_REFSYS_BASE_M4 (ADI_3_REFSYS_BASE + ADI_MASK4B)
107
#define ADI3 ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE))
111
#define ADI3_SET ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE_SET))
115
#define ADI3_CLR ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE_CLR))
119
#define ADI3_M4 ((adi_3_refsys_regs_m4_t *) (ADI_3_REFSYS_BASE_M4))
120
121
#ifdef __cplusplus
122
}
123
#endif
124
125
#endif
/* CC26XX_CC13XX_ADI_H */
cc26xx_cc13xx.h
CC26xx, CC13xx definitions.
reg8_t
volatile uint8_t reg8_t
Unsigned 8-bit register type.
Definition
cc26xx_cc13xx.h:32
adi_3_refsys_regs_m4_t
ADI_3_REFSYS registers.
Definition
cc26xx_cc13xx_adi.h:54
adi_3_refsys_regs_m4_t::REFSYSCTL0
reg8_m4_t REFSYSCTL0
Internal.
Definition
cc26xx_cc13xx_adi.h:57
adi_3_refsys_regs_m4_t::DCDCCTL3
reg8_m4_t DCDCCTL3
Internal.
Definition
cc26xx_cc13xx_adi.h:64
adi_3_refsys_regs_m4_t::DCDCCTL5
reg8_m4_t DCDCCTL5
Internal.
Definition
cc26xx_cc13xx_adi.h:66
adi_3_refsys_regs_m4_t::DCDCCTL2
reg8_m4_t DCDCCTL2
DCDC Control 2.
Definition
cc26xx_cc13xx_adi.h:63
adi_3_refsys_regs_m4_t::REFSYSCTL1
reg8_m4_t REFSYSCTL1
Internal.
Definition
cc26xx_cc13xx_adi.h:58
adi_3_refsys_regs_m4_t::REFSYSCTL3
reg8_m4_t REFSYSCTL3
Internal.
Definition
cc26xx_cc13xx_adi.h:60
adi_3_refsys_regs_m4_t::__reserved1
reg8_m4_t __reserved1
Reserved.
Definition
cc26xx_cc13xx_adi.h:55
adi_3_refsys_regs_m4_t::DCDCCTL1
reg8_m4_t DCDCCTL1
DCDC Control 1.
Definition
cc26xx_cc13xx_adi.h:62
adi_3_refsys_regs_m4_t::REFSYSCTL2
reg8_m4_t REFSYSCTL2
Internal.
Definition
cc26xx_cc13xx_adi.h:59
adi_3_refsys_regs_m4_t::DCDCCTL4
reg8_m4_t DCDCCTL4
Internal.
Definition
cc26xx_cc13xx_adi.h:65
adi_3_refsys_regs_m4_t::ATESTCTL1
reg8_m4_t ATESTCTL1
Internal.
Definition
cc26xx_cc13xx_adi.h:56
adi_3_refsys_regs_m4_t::DCDCCTL0
reg8_m4_t DCDCCTL0
DCDC Control 0.
Definition
cc26xx_cc13xx_adi.h:61
adi_3_refsys_regs_t
ADI_3_REFSYS registers.
Definition
cc26xx_cc13xx_adi.h:31
adi_3_refsys_regs_t::DCDCCTL5
reg8_t DCDCCTL5
Internal.
Definition
cc26xx_cc13xx_adi.h:43
adi_3_refsys_regs_t::DCDCCTL0
reg8_t DCDCCTL0
DCDC Control 0.
Definition
cc26xx_cc13xx_adi.h:38
adi_3_refsys_regs_t::DCDCCTL1
reg8_t DCDCCTL1
DCDC Control 1.
Definition
cc26xx_cc13xx_adi.h:39
adi_3_refsys_regs_t::REFSYSCTL3
reg8_t REFSYSCTL3
Internal.
Definition
cc26xx_cc13xx_adi.h:37
adi_3_refsys_regs_t::ATESTCTL1
reg8_t ATESTCTL1
Internal.
Definition
cc26xx_cc13xx_adi.h:33
adi_3_refsys_regs_t::__reserved1
reg8_t __reserved1
Reserved.
Definition
cc26xx_cc13xx_adi.h:32
adi_3_refsys_regs_t::DCDCCTL4
reg8_t DCDCCTL4
Internal.
Definition
cc26xx_cc13xx_adi.h:42
adi_3_refsys_regs_t::REFSYSCTL0
reg8_t REFSYSCTL0
Internal.
Definition
cc26xx_cc13xx_adi.h:34
adi_3_refsys_regs_t::DCDCCTL3
reg8_t DCDCCTL3
Internal.
Definition
cc26xx_cc13xx_adi.h:41
adi_3_refsys_regs_t::REFSYSCTL2
reg8_t REFSYSCTL2
Internal.
Definition
cc26xx_cc13xx_adi.h:36
adi_3_refsys_regs_t::DCDCCTL2
reg8_t DCDCCTL2
DCDC Control 2.
Definition
cc26xx_cc13xx_adi.h:40
adi_3_refsys_regs_t::REFSYSCTL1
reg8_t REFSYSCTL1
Internal.
Definition
cc26xx_cc13xx_adi.h:35
reg8_m4_t
Masked 8-bit register.
Definition
cc26xx_cc13xx.h:45
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