cpu_conf.h
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1 /*
2  * Copyright (C) 2016 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef CPU_CONF_H
23 #define CPU_CONF_H
24 
25 #include "cpu_conf_common.h"
26 
27 #ifdef CPU_MODEL_NRF52832XXAA
28 #include "vendor/nrf52.h"
29 #include "vendor/nrf52_bitfields.h"
30 #elif defined(CPU_MODEL_NRF52840XXAA)
31 #include "vendor/nrf52840.h"
32 #include "vendor/nrf52840_bitfields.h"
33 #else
34 #error "The CPU_MODEL of your board is currently not supported"
35 #endif
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
45 #define CPU_DEFAULT_IRQ_PRIO (2U)
46 #define CPU_FLASH_BASE (0x00000000)
47 #ifdef CPU_MODEL_NRF52832XXAA
48 #define CPU_IRQ_NUMOF (38U)
49 #elif CPU_MODEL_NRF52840XXAA
50 #define CPU_IRQ_NUMOF (46U)
51 #endif
52 
58 #define FLASHPAGE_SIZE (4096U)
59 
60 #if defined(CPU_MODEL_NRF52832XXAA)
61 #define FLASHPAGE_NUMOF (128U)
62 #elif defined(CPU_MODEL_NRF52840XXAA)
63 #define FLASHPAGE_NUMOF (256U)
64 #endif
65 
66 /* The minimum block size which can be written is 4B. However, the erase
67  * block is always FLASHPAGE_SIZE.
68  */
69 #define FLASHPAGE_RAW_BLOCKSIZE (4U)
70 /* Writing should be always 4 bytes aligned */
71 #define FLASHPAGE_RAW_ALIGNMENT (4U)
72 
78 #ifdef SOFTDEVICE_PRESENT
79 #ifndef DONT_OVERRIDE_NVIC
80 #include "nrf_soc.h"
81 #undef NVIC_SetPriority
82 #define NVIC_SetPriority sd_nvic_SetPriority
83 #endif /* DONT_OVERRIDE_NVIC */
84 #endif /* SOFTDEVICE_PRESENT */
85 
90 static inline void nrf52_sleep(void)
91 {
92  __SEV();
93  __WFE();
94  __asm("nop");
95 }
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
101 #endif /* CPU_CONF_H */
102 
Common CPU definitione for Cortex-M family based MCUs.
static void nrf52_sleep(void)
SoftDevice settings.
Definition: cpu_conf.h:90