periph_cpu_common.h

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/*
 * Copyright (C) 2015 Freie Universität Berlin
 *
 * This file is subject to the terms and conditions of the GNU Lesser
 * General Public License v2.1. See the file LICENSE in the top level
 * directory for more details.
 */
 
#ifndef PERIPH_CPU_COMMON_H
#define PERIPH_CPU_COMMON_H
 
#include <stdbool.h>
 
#include "bitarithm.h"
#include "compiler_hints.h"
#include "cpu.h"
#include "msp430_regs.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define HAVE_GPIO_T
typedef uint16_t gpio_t;
#define GPIO_UNDEF          (0xffff)
 
#define GPIO_PIN(x, y)      ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0x07))))
 
#define SPI_HWCS(x)         (SPI_CS_UNDEF)
 
#define TIMER_CHANNEL_NUMOF 7
 
#define HAVE_GPIO_FLANK_T       
typedef enum {
    GPIO_FALLING = 0xff,        
    GPIO_RISING  = 0x00,        
    GPIO_BOTH    = 0xab         
} gpio_flank_t;
enum {
    P1 = 1,                 
    P2 = 2,                 
    P3 = 3,                 
    P4 = 4,                 
    P5 = 5,                 
    P6 = 6,                 
};
 
void gpio_periph_mode(gpio_t pin, bool enable);
 
extern uint32_t msp430_dco_freq;
 
typedef enum {
    MAIN_CLOCK_SOURCE_DCOCLK       = SELM_0,
    MAIN_CLOCK_SOURCE_XT2CLK       = SELM_2,
    MAIN_CLOCK_SOURCE_LFXT1CLK     = SELM_3,
} msp430_main_clock_source_t;
 
typedef enum {
    SUBMAIN_CLOCK_SOURCE_DCOCLK        = 0,
    SUBMAIN_CLOCK_SOURCE_XT2CLK        = SELS,
    SUBMAIN_CLOCK_SOURCE_LFXT1CLK      = SELS,
} msp430_submain_clock_source_t;
 
typedef enum {
    MAIN_CLOCK_DIVIDE_BY_1      = DIVM_0,
    MAIN_CLOCK_DIVIDE_BY_2      = DIVM_1,
    MAIN_CLOCK_DIVIDE_BY_4      = DIVM_2,
    MAIN_CLOCK_DIVIDE_BY_8      = DIVM_3,
} msp430_main_clock_divider_t;
 
typedef enum {
    SUBMAIN_CLOCK_DIVIDE_BY_1   = DIVS_0,
    SUBMAIN_CLOCK_DIVIDE_BY_2   = DIVS_1,
    SUBMAIN_CLOCK_DIVIDE_BY_4   = DIVS_2,
    SUBMAIN_CLOCK_DIVIDE_BY_8   = DIVS_3,
} msp430_submain_clock_divider_t;
 
typedef enum {
    AUXILIARY_CLOCK_DIVIDE_BY_1   = DIVA_0,
    AUXILIARY_CLOCK_DIVIDE_BY_2   = DIVA_1,
    AUXILIARY_CLOCK_DIVIDE_BY_4   = DIVA_2,
    AUXILIARY_CLOCK_DIVIDE_BY_8   = DIVA_3,
} msp430_auxiliary_clock_divider_t;
 
typedef struct {
    uint32_t target_dco_frequency;
    uint32_t lfxt1_frequency;
    uint32_t xt2_frequency;
    msp430_main_clock_source_t main_clock_source;
    msp430_submain_clock_source_t submain_clock_source;
    msp430_main_clock_divider_t main_clock_divier;
    msp430_submain_clock_divider_t submain_clock_divier;
    msp430_auxiliary_clock_divider_t auxiliary_clock_divier;
    bool has_r_osc;
    bool has_xt2;
} msp430_clock_params_t;
 
typedef enum {
    TIMER_CLOCK_SOURCE_TXCLK = TXSSEL_TXCLK,            
    TIMER_CLOCK_SOURCE_AUXILIARY_CLOCK = TXSSEL_ACLK,   
    TIMER_CLOCK_SOURCE_SUBMAIN_CLOCK = TXSSEL_SMCLK,    
    TIMER_CLOCK_SOURCE_INCLK = TXSSEL_INCLK,            
} msp430_timer_clock_source_t;
 
typedef struct {
    msp430_timer_t *timer;                         
    REG16 *irq_flags;
    msp430_timer_clock_source_t clock_source;   
} timer_conf_t;
 
void default_clock_init(void);
 
void clock_init(void);
 
uint32_t PURE msp430_submain_clock_freq(void);
 
uint32_t PURE msp430_auxiliary_clock_freq(void);
 
#ifdef __cplusplus
}
#endif
 
#endif /* PERIPH_CPU_COMMON_H */