83#define UXTCTL_SSEL_UCLKI   0                
   84#define UXTCTL_SSEL_ACLK    SSEL0            
   85#define UXTCTL_SSEL_SMCLK   SSEL1            
   86#define UXTCTL_SSEL_MASK    (SSEL0 | SSEL1)  
#define REG8
Register types.
Cortex CMSIS style definition of MSP430 registers.
GPIO Port 1/2 (with interrupt functionality)
Common MSP GPIO Port Registers.
USART Special Function Registers (SFR)
const uint8_t _pad2
Padding.
REG8 IE
USART Interrupt Enable Register.
const uint8_t _pad1
Padding.
REG8 ME
Module Enable Register.
REG8 IFG
USART Interrupt Flag Register.
USART (UART, SPI and I2C) Registers.
REG8 TCTL
transmit control
REG8 BR0
baud rate control 0
REG8 TXBUF
transmit buffer
REG8 MCTL
modulation control
REG8 BR1
baud rate control 1
msp430_usart_sfr_t USART_1_SFR
USART 1 SFR register map.
msp430_usart_t USART_1
USART 1 register map.
msp430_usart_t USART_0
USART 0 register map.
msp430_usart_sfr_t USART_0_SFR
USART 0 SFR register map.