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board.h
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/*
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* Copyright (C) 2018 Eistec AB
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* Copyright (C) 2018 HAW Hamburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "
periph_conf.h
"
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#ifdef __cplusplus
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extern
"C"
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{
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#endif
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/* Set the FOPT bit to disable NMI so that we can use it as a GPIO pin for
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* the LED (PTB18) */
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#define KINETIS_FOPT (0xff & ~(NV_FOPT_NMI_DIS_MASK))
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#define LED0_PIN GPIO_PIN(PORT_B, 3)
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#define LED0_MASK (1 << 3)
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#define LED0_ON (GPIOB->PCOR = LED0_MASK)
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#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
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#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
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#define LED1_PIN GPIO_PIN(PORT_B, 1)
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#define LED1_MASK (1 << 1)
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#define LED1_ON (GPIOB->PCOR = LED1_MASK)
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#define LED1_OFF (GPIOB->PSOR = LED1_MASK)
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#define LED1_TOGGLE (GPIOB->PTOR = LED1_MASK)
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#define LED2_PIN GPIO_PIN(PORT_B, 0)
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#define LED2_MASK (1 << 0)
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#define LED2_ON (GPIOB->PCOR = LED2_MASK)
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#define LED2_OFF (GPIOB->PSOR = LED2_MASK)
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#define LED2_TOGGLE (GPIOB->PTOR = LED2_MASK)
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#define LED3_PIN GPIO_PIN(PORT_B, 18)
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#define LED3_MASK (1 << 18)
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#define LED3_ON (GPIOB->PCOR = LED3_MASK)
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#define LED3_OFF (GPIOB->PSOR = LED3_MASK)
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#define LED3_TOGGLE (GPIOB->PTOR = LED3_MASK)
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/* Pressing SW1 will short this pin to ground but there are no external pull
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* resistors, use internal pull-up on the pin */
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/* BTN0 is mapped to SW1 */
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#define BTN0_PIN GPIO_PIN(PORT_C, 5)
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#define BTN0_MODE GPIO_IN_PU
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#define V_PERIPH_PIN GPIO_PIN(PORT_C, 19)
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#define V_PERIPH_MASK (1 << 19)
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#define V_PERIPH_ON (GPIOC->PSOR = V_PERIPH_MASK)
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#define V_PERIPH_OFF (GPIOC->PCOR = V_PERIPH_MASK)
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#if IS_ACTIVE(KINETIS_XTIMER_SOURCE_PIT)
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/* PIT xtimer configuration */
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#define XTIMER_DEV (TIMER_PIT_DEV(0))
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#define XTIMER_CHAN (0)
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/* Default xtimer settings should work on the PIT */
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#else
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/* LPTMR xtimer configuration */
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#define XTIMER_DEV (TIMER_LPTMR_DEV(0))
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#define XTIMER_CHAN (0)
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/* LPTMR is 16 bits wide and runs at 32768 Hz (clocked by the RTC) */
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#define XTIMER_WIDTH (16)
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#define XTIMER_BACKOFF (5)
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#define XTIMER_ISR_BACKOFF (5)
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#define XTIMER_HZ (32768ul)
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#endif
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#define CONFIG_ZTIMER_USEC_TYPE ZTIMER_TYPE_PERIPH_TIMER
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#define CONFIG_ZTIMER_USEC_DEV (TIMER_PIT_DEV(0))
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#define CCS811_PARAM_I2C_DEV (I2C_DEV(0))
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#define CCS811_PARAM_I2C_ADDR (0x5A)
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#define CCS811_PARAM_RESET_PIN (GPIO_UNDEF)
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#define CCS811_PARAM_WAKE_PIN (GPIO_PIN(1, 2))
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#define CCS811_PARAM_INT_PIN (GPIO_PIN(1, 3))
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#define CCS811_PARAM_INT_MODE (CCS811_INT_NONE)
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#define TCS37727_PARAM_I2C (I2C_DEV(0))
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#define TCS37727_PARAM_ADDR (0x29)
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#define MMA8X5X_PARAM_I2C (I2C_DEV(0))
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#define MMA8X5X_PARAM_ADDR (0x1D)
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#ifdef __cplusplus
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}
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#endif
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#endif
/* BOARD_H */
periph_conf.h
Native CPU peripheral configuration.
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