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epd_bw_spi_internal.h
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1/*
2 * Copyright (C) 2019 Silke Hofstra
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
21#ifndef EPD_BW_SPI_INTERNAL_H
22#define EPD_BW_SPI_INTERNAL_H
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
34#define EPD_BW_SPI_CMD_DRIVER_OUTPUT_CONTROL (0x01)
35#define EPD_BW_SPI_CMD_GATE_DRIVING_VOLTAGE_CONTROL (0x03) /* unused */
36#define EPD_BW_SPI_CMD_SOURCE_DRIVING_VOLTAGE_CONTROL (0x04) /* unused */
37#define EPD_BW_SPI_CMD_DISPLAY_CONTROL (0x07) /* unused */
38#define EPD_BW_SPI_CMD_GATE_AND_SOURCE_NON_OVERLAP_PERIOD_CONTROL (0x0B) /* unused */
39#define EPD_BW_SPI_CMD_BOOSTER_SOFT_START_CONTROL (0x0C)
40#define EPD_BW_SPI_CMD_GATE_SCAN_START_POSITION (0x0F) /* unused */
41#define EPD_BW_SPI_CMD_DEEP_SLEEP_MODE (0x10)
42#define EPD_BW_SPI_CMD_DATA_ENTRY_MODE_SETTING (0x11)
43#define EPD_BW_SPI_CMD_SWRESET (0x12)
44#define EPD_BW_SPI_CMD_TEMPERATURE_SENSOR_CONTROL_WRITE (0x1A) /* unused */
45#define EPD_BW_SPI_CMD_TEMPERATURE_SENSOR_CONTROL_READ (0x1B) /* unused */
46#define EPD_BW_SPI_CMD_TEMPERATURE_SENSOR_CONTROL_WRITE_CMD (0x1C) /* unused */
47#define EPD_BW_SPI_CMD_TEMPERATURE_SENSOR_CONTROL_LOAD (0x1D) /* unused */
48#define EPD_BW_SPI_CMD_MASTER_ACTIVATION (0x20)
49#define EPD_BW_SPI_CMD_DISPLAY_UPDATE_CONTROL_1 (0x21) /* unused */
50#define EPD_BW_SPI_CMD_DISPLAY_UPDATE_CONTROL_2 (0x22)
51#define EPD_BW_SPI_CMD_WRITE_RAM (0x24)
52#define EPD_BW_SPI_CMD_READ_RAM (0x25) /* unused */
53#define EPD_BW_SPI_CMD_VCOM_SENSE (0x28) /* unused */
54#define EPD_BW_SPI_CMD_VCOM_SENSE_DURATION (0x29) /* unused */
55#define EPD_BW_SPI_CMD_PROGRAM_VCOM_OTP (0x2A) /* unused */
56#define EPD_BW_SPI_CMD_WRITE_VCOM_REGISTER (0x2C)
57#define EPD_BW_SPI_CMD_READ_OTP_REGISTERS (0x2D) /* unused */
58#define EPD_BW_SPI_CMD_PROGRAM_WS_OTP (0x30) /* unused */
59#define EPD_BW_SPI_CMD_WRITE_LUT_REGISTER (0x32)
60#define EPD_BW_SPI_CMD_READ_LUT_REGISTER (0x33) /* unused */
61#define EPD_BW_SPI_CMD_PROGRAM_OTP_SELECTION (0x36) /* unused */
62#define EPD_BW_SPI_CMD_OTP_SELECTION_CONTROL (0x37) /* unused */
63#define EPD_BW_SPI_CMD_SET_DUMMY_LINE_PERIOD (0x3A)
64#define EPD_BW_SPI_CMD_SET_GATE_LINE_WIDTH (0x3B)
65#define EPD_BW_SPI_CMD_BORDER_WAVEFORM_CONTROL (0x3C) /* unused */
66#define EPD_BW_SPI_CMD_SET_RAM_X (0x44)
67#define EPD_BW_SPI_CMD_SET_RAM_Y (0x45)
68#define EPD_BW_SPI_CMD_SET_RAM_X_ADDR_COUNTER (0x4E)
69#define EPD_BW_SPI_CMD_SET_RAM_Y_ADDR_COUNTER (0x4F)
70#define EPD_BW_SPI_CMD_NOP (0xFF)
79#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_ENABLE_CLOCK (1<<7)
80#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_ENABLE_CP (1<<6)
81#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_LOAD_TEMP (1<<5)
82#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_LOAD_LUT (1<<4)
83#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_INITIAL_DISPLAY (1<<3)
84#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_PATTERN_DISPLAY (1<<2)
85#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_DISABLE_CP (1<<1)
86#define EPD_BW_SPI_DISPLAY_UPDATE_OPTION_DISABLE_OSC (1<<0)
94#define EPD_BW_SPI_WAIT_UPDATE_FULL 1200
95#define EPD_BW_SPI_WAIT_UPDATE_PART 300
96#define EPD_BW_SPI_WAIT_ACTIVATION 80
97#define EPD_BW_SPI_WAIT_RESET 1
100#ifdef __cplusplus
101}
102#endif
103#endif /* EPD_BW_SPI_INTERNAL_H */